design a module from a trip data flow channeling Lane detected bitstream "1...

说明：  risc 8 by coonan compatible with PIC16C57

EDA技术及其应用《序列信号发生器的设计》，包括源文件。(EDA technology and its applications " sequence signal generator design, including source files.)

AGC(自动增益放大) Verilog代码 设计可以参考 第二部分(AGC (automatic gain control) can refer to the Verilog code design )

键盘输入串口输出显示字符,通过串口显示键盘输入的字符-Keyboard input serial output display characters, the keyboard input through serial display characters

Syllabus for VSC-HVDC course

售货机-VHDL语言-已调试通过 真的很好用哦~适合一切学习EDA的初学者，能够让你轻松度过EDA课！~(Vending machine-VHDL language- has been really good with debugging by Oh ~ EDA for all beginners to learn, to let you easily through the EDA class! ~)

基于CPLD器件EPM570，用VHDL语言编写的并串转换器代码，用于实现并行代码到串行代码的转换

Xilinx system generator

a sequence generator

BCH3.c,提供m<21以下的所有码长的BCH编解码模块。以供大家参考。谢谢(BCH encoder&decoder GF(2^m) m<21)