VHDL source code of the 100 cases, including the addition, subtraction, storage,...

ldpc译码算法介绍及fpga verilog系统方案设计，包括log_bp算法、min_sum算法、scaling_min_sum算法等(introducing the ldpc code decoding algorithm and the related system design，including the log_bp,the min_sum and the scaling_min_sum)

    本资源详细的设计了一个FIFO的用法，将数据从ROM中读取送到FIFO缓存中然后RAM从FIFO缓存中读取数据存到内存中，改程序可以很好的学习三者之间的关系

4位的超前进位加法器，门级电路连接得到，verilog代码实现(4-bit look-ahead adder, gate-level circuit)

用verilog语言实现加密芯片DS28E01的调用操作命令。(Using Verilog language to achieve the encryption chip DS28E01 call operation commands.)

verilog 入门概述 新手学习资料-Getting Started with an overview of novice learning materials verilog

Viterberi 解码器使用 vhdl 编程实现将被用于制作增强功能

dos下的svga图形库，包括读bmp位图，打点划线等(svga graphics library under dos)

用verilog语言写的简单的键盘扫描代码，适合初学者，用alter的软件编写的程序代码。(Using verilog language to write simple keyboard scan code, suitable for beginners, with alter software program written code.)

The Date prototype object is itself a Date object (its [[Class]] is "Date") whose value is NaN.

含异步清零和同步清零的计数器的设计，内容是源代码，以及相关文件，打开即可(Clear cleared asynchronous and synchronous with the counter design, content source code and related documents, can be opened)