基于VHDL+FPGA的DDS信号发生设计，已经通过调式

Verilog 实验代码。。。经典的，里面都是完整的项目文件。 ISE环境。(Verilog test code. . . Classic, which is a complete project file. ISE environment.)

步进电机控制程序，用vhdl实现。可实现电机的正反转控制-Stepper motor control program, using vhdl implementation. Positive inversion of motor control can be realized

Verilog 写的HDMI接口源程序及说明文档(HDMI interface verilog code and specificaiton paper)

这是OFDM调制matlab的程序，中间详细描述了调制的过程，希望对大家有用。(This is the OFDM modulation matlab procedures, a detailed description of the intermediate modulation process, I hope useful.)

这里面有许多vhdl的例子，相信对这语言的初学者受益匪浅-There are many examples of vhdl, I believe that beginners benefit from this language

ip core of the transceiver gtx

表决器，简单实现了表决功能，无显示功能 -vote

Verilog_HDL源码， Verilog_HDL源码-Verilog_HDL source, Verilog_HDL FO

基于System Generator的图像处理工程,多媒体处理FPGA实现的源码,图像形态学部分,腐蚀,膨胀,细化算法(System Generator based image processing engineering, multimedia processing FPGA implementation source code, image morphology section, corrosion, swelling, thinning algorithm)

verilog入门基础以及简单编程介绍，verilog是近几年发展迅速的一门硬件语言-Verilog entry basis, as well as introduce a simple programming, verilog in recent years the rapid development of a hardware language