示波器代码

数字信号处理的FPGA实现(第4版)的配套源码，极具参考价值。(The source code of the realization of digital signal processing on FPGA (4th edition) is of great reference value.)

基于xilinx公司的SPARTAN6系列芯片的高速全双工串行收发器(high-speed transceiver based on spartan 6 of Xilinx PFGA)

该代码为VHDL语言描述的AD579 SPI通讯程序，包括一些代码注解。(Thisis a SPI communication promgram of AD5791 designed with VHDL which compared with some discreption.)

ＡＥＳ的Ｖｅｒｉｌｏｇ实现源码，速度还可以，ｓ盒使用ｃａｓｅ实现的，ｔｅｓｔｂｅｎｃｈ的测试数据有２百多，已经过验证。在ＤＣ　下跑到８００ｍＨＺ．

华为内部资料，关于FPGA设计的详细过程介绍，很不错的。本文档从FPGA器件结构出发以速度路径延时大小和面积资源占用率为主题描述在FPGA设计过程中应当注意的问题和可以采用的设计技巧。(Huawei internal information, with regard to detailed FPGA design process of introduction, it is good. This document from the FPGA device structure in order to speed the path delay and area the size of the theme of the occupancy rate of resource description in the FPGA design process should pay attention to the problems and design techniques can be used.)

thesis about design and implementation neural network using FPGA

dct and idct vhdl code

它包含大量用于常见项目的经典verilog代码，如FIFO、add8、RS编码、多路复用等。

4位的booth算法加法器，对计算机组成原理的学习有帮助，verilog语言编写(4-bit adder booth algorithm, the learning of computer organization help, verilog language)

Design FPGA in Labview