Verilog代码。注册成功，对FPGA的使用标准单元库…

说明：  this file describes the steps in building a fifo buffer module in verilog hdl and programming them on an fpga device

实现NAND Flash块的控制存取以及同步的FIFO的控制 verilog 代码(NAND Flash control access and control of the synchronous FIFO verilog code)

利用Quartus 综合简单的计时器功能，欢迎大家下载、参考。谢谢大家的支持！

说明：  利用FPGA实现TMDS接口标准，可用于DVI以及HDMI接口的FPGA实现（含文档）(Video Connectivity Using TMDS I/O in Spartan-3A FPGAs)

This is a simple example of FIFO(first in and first out) module written in verilog code(This is a simple example of FIFO (first in and first out) module written in verilog code)

mc8051内核,VHDL程序,内有说明,超详细.-mc8051 kernel, VHDL program, which has made it clear, super-detailed.

高级FPGA设计__结构、实现和优化,中文翻译版(Advanced FPGA Design- Architecture, Implementation, and Optimization)

基于nios ii 驱动altera de1开发板上的lcd和ps2鼠标模块工程-based on the nios ii drive the lcd and ps2 module of altera de1 develop board

FPGA编写环境，具有仿真容易，软件内存小的特点(FPGA authoring environment, with easy simulation software features small memory)

40M时钟输入经过iserdes倍频到960M(input 40M o clock and output 960M )