mod 6 计数器

Vending Machine simulation using Moore sequence

通信系统帧同步信号的设计与实现，巴克码识别器系统完整VHDL程序，本人课程设计，完全能正常运行，程序运行环境为Quartus II 7.2 (32-Bit)，win7系统。编译码模块、分频模块、门限设置模块、仿真电路和程序都有。相互交流，共同学习！！

de2_clock on altera de2 board

交通灯电路，南北方向和东西方向分别按绿灯、黄灯、左拐灯、黄灯、红灯的顺序两灭，数码管显示相应的灯亮的时间的倒计时。已通过编译和仿真。-Traffic light circuit, north-south direction and east-west direction respectively green, yellow light, left light, yellow light, red light destroy the order of two, a digital LED display lights the corresponding period of the countdown. Has passed the compilation and simulation.

rs422标准通讯模块 异步收发 verilog语言编写(rs422 standard communication module asynchronous receiver verilog language)

联邦滤波法，毕设时写的，可以和其他方法的做比较(Kalman filter, write the complete set up, and other methods to compare)

Xilinx FPGA reset usage

I2C配置tvp5150用VHDL写的 -I2C configuration tvp5150 written using VHDL

led 点阵显示led――rom实现，功能模块分离 就爱可根据卡加大公开吉安市贷款给经济 -led dot matrix display led-- rom realized, functional modules can be separated on the basis love Cagayan open to the public Ji"an City loans to the economy

Any change to the value of Mresults in immediate and phase-continuous changes in the output frequency