登录
首页 » VHDL » VHDL描述的简易图像缩小模块,将PAL制720×576的图片缩小为512×410,采用最近临域法,13.5MHz时钟下可实时处理PAL视频。...

VHDL描述的简易图像缩小模块,将PAL制720×576的图片缩小为512×410,采用最近临域法,13.5MHz时钟下可实时处理PAL视频。...

于 2022-06-11 发布 文件大小:9.51 kB
0 194
下载积分: 2 下载次数: 1

代码说明:

VHDL描述的简易图像缩小模块,将PAL制720×576的图片缩小为512×410,采用最近临域法,13.5MHz时钟下可实时处理PAL视频。-VHDL description of a simple image to narrow the module, will be PAL system of 720 × 576 image reduced to 512 × 410, using the recent Pro-domain method, 13.5MHz clock can handle PAL video in real time.

下载说明:请别用迅雷下载,失败请重下,重下不扣分!

发表评论

0 个回复

  • math_real
    in this code very useful for designing real number concept
    2013-11-19 19:54:40下载
    积分:1
  • Quartus中实现的DDS 使用的是altera提供的IP core
    Quartus中实现的DDS 使用的是altera提供的IP core-DDS achieved Quartus using IP core provided by altera
    2022-07-12 10:39:19下载
    积分:1
  • this come from alter ,you can look and find it on line about USB
    this come from alter ,you can look and find it on line about USB
    2023-09-06 16:15:03下载
    积分:1
  • fifo
    fifo的代码,经过测试可以使用,很有用处,可以放心使用(a fifo module,the code has been tested and it is usefull)
    2010-03-02 22:03:30下载
    积分:1
  • Endat2_1_freq
    用verilog实现endat2_1驱动,并用signalTap捕捉信号。(Using verilog achieve endat2_1 drive and use signalTap capture signal.)
    2021-04-26 15:08:45下载
    积分:1
  • HDMI接口编解码传输模块ASIC设计_刘文杰
    ? 熟悉IIC协议总线协议,采用IIC总线对图像采集传感器寄存器进行配置,并转换为RGB565格式。 ? 利用异步FIFO完成从摄像头输出端到SDRAM 和SDRAM 到VGA 接口各跨时钟域信号的传输和处理。 ? 利用 SDRAM 接口模块的设计,实现了刷新、读写等操作;为提高SDRAM 的读写带宽,均采用突发连续读写数据方式;并采用乒乓操作实现 CMOS 摄像头与VGA的帧率匹配。 ? 利用双线性插值方法实现对图像640×480到1024×768的放大操作。 ? 完成VGA显示接口设计。(Familiar with IIC protocol bus protocol, IIC bus is used to configure the register of image acquisition sensor and convert it into RGB565 format. Asynchronous FIFO is used to transmit and process signals across clock domain from camera output to SDRAM and SDRAM to VGA interface. With the design of SDRAM interface module, refresh, read and write operations are realized. In order to improve the read and write bandwidth of SDRAM, burst continuous read and write data mode is adopted, and table tennis operation is used to achieve frame rate matching between CMOS camera and VGA. The bilinear interpolation method is used to enlarge the image from 640*480 to 1024*768. Complete the VGA display interface design.)
    2020-06-25 04:00:02下载
    积分:1
  • 91026977FC-protocal
    光纤通道协议,包括FC-SW,FC-FS,FC-LS,FC-GS,FC-HBA,FC-AE-ASM等文档。 (Fibre Channel protocols, including FC-SW, FC-FS, FC-LS, FC-GS, FC-HBA, FC-AE-ASM and other documents.)(Fiber channel protocol, including FC-SW, FC-FS, FC-LS, FC-GS, FC-HBA, FC-AE-ASM and other documents. (Fibre Channel protocols, including FC-SW, FC-FS, FC-LS, FC-GS, FC-HBA, FC-AE-ASM and FC-AE-ASM))
    2018-05-16 16:26:01下载
    积分:1
  • fftshixian
    基于FPGA编写的verilog代码,在xilinx上仿真实现FFT变换(FPGA-based verilog code written in xilinx FFT transform Simulation)
    2015-04-05 11:42:08下载
    积分:1
  • jishuqi
    计数器是数字系统中使用最多的时序电路,它不仅能用于对时钟脉冲计数,还可以用于分频、定时、产生节拍脉冲和脉冲序列以及进行数字运算等。(Counter is the most frequently used sequential circuit in digital system. It can be used not only for counting clock pulses, but also for frequency division, timing, generating beat pulses and pulse sequences, and performing digital operations.)
    2018-11-26 15:42:03下载
    积分:1
  • QAMMod
    QAM调制,解调matlab代码,包含BPSK,QPSK,16QAM,64QAM,256QAM,1024QAM,4096QAM。其中调制方式。代码通过验证。(QAM modulator,demodulator)
    2020-10-26 16:59:59下载
    积分:1
  • 696516资源总数
  • 106914会员总数
  • 0今日下载