vhdl classic example

讲述4ASK的原理并附有matlab调制解调的源码。。。。。。。。。。 注：原来上传的4ASKmod.zip不要下(The principle tells 4ASK together with modulation and demodulation matlab source. . . . . . . . . . Note: The original upload 4ASKmod.zip not down)

very good code for edge detection based on vhdl programming.

基于vhdl语言的15位gold序列的设计的开端一部分程序(Vhdl language based on sequences of the 15 gold as part of the beginning of the design process)

Digital Design and Modeling with VHDL and Synthesis

用ALTERA的FPGA实现UDP通信源代码(FPGA UDP)

基于FPGA的TLC2543控制器,采用状态进行控制ADC进行转换(The TLC2543 controller based on FPGA, using state control of ADC conversion)

library ieee; use ieee.std_logic_1164.all; use ieee.std_logic_unsigned.all; entity song is    port(clk_4MHz,clk_4Hz:in std_logic;      ----预置计数器和乐谱产生器的时钟         digit:buffer std_logic_vector(6 downto 0);  ----高、中、低音数码管指示         zero:out std_logic_vector(4 downto 0);     ----用于数码管高位置低  

通过总结当前对处理器架构的安全性能的处理方法，提出一种增强DSP处理器安全性能的方法。主要从并行性方面进行了改进。最后对改进的方法进行了仿真和结果分析。(By summing up the current security architecture of the processor performance approach, a DSP processor to enhance the safety performance of the method. Mainly from the aspects of parallelism to improve. Finally, improved methods and results of simulation analysis.)

ps2接口源程序。标准的键盘和鼠标接口，在Xilinx SpartanII XC2S200 实验板上通过验证-ps2 interface source. Standard keyboard and mouse interface, in the experiments on-board Xilinx SpartanII XC2S200 validated

QPSK调制的载波频偏估计，是一个可以调用的函数。接收端进行了一系列的处理。经典的Fitz法(QPSK-carrier frequence offset estimation_ Fitz)