ML605板子上的灯

DAC0832 VHDL源程序 一个适合初学都的程序 (DAC0832 VHDL source code of a program suitable for both beginners)

Quartus II 7.2最完美的license破解器!(Quartus II 7.2 FULL and perfect License!)

vs自定义插件开发,带卸载功能,经测试完全可用，分享给大家，可以学习！(vs custom plug-in development, with the uninstall feature, has been tested and is fully available for everyone to share, you can learn!)

fft变换三个中的一个（站长：三个代码算一个）-one of the three fft transfermation code

说明：  环路滤波器是通信信号调制解调中最重要的一个部分，环路滤波器设计的好坏将直接影响到接收机的性能指标，二阶锁频辅助三阶锁相环路滤波器可以稳定跟踪具有加加速度的信号源，是现代通信中非常实用的技术，本文中详细编写了单载波信号产生模块、信道噪声模块、数字正交下变频模块、鉴频鉴相模块、环路滤波器模块，并包含了完整的testbench模块，对于初学者非常有用。(Loop filter is the most important part of communication signal modulation and demodulation. The design of loop filter will directly affect the performance index of receiver. The second-order frequency locking assisted third-order phase-locked loop filter can stably track the signal source with acceleration speed, which is a very practical technology in modern communication. In this paper, the single carrier signal generation module and channel noise are written in detail Sound module, digital orthogonal down conversion module, frequency and phase detection module, loop filter module, and contains a complete testbench module, which is very useful for beginners.)

可实现两个4bit补码的加法及减法，有溢出提示(adder with overflow hint)

ahb总线Verilog代码及sv仿真文件(ahb bus Verilog code and sv simulation code)

Program for simulate a prtsc

H264/AVS中的离散余弦变换DCT以及反离散余弦变换IDCT的Verilog代码(H264/AVS the discrete cosine transform and inverse discrete cosine transform DCT IDCT of Verilog code)

用verilog编写在FLEX10K上实现的简易CPU-used in the preparation of Verilog FLEX10K achieve simple CPU