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键盘接口电路的一个工程
键盘接口电路的一个工程---包括vhdl源程序和编译后产生的相关文件-Keyboard interface circuit of a project--- including VHDL source code and compile the relevant documents after
- 2022-05-19 23:52:35下载
- 积分:1
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JSFP
奇数分频-此程序对输入频率sysclk有奇数(X)分频的功能(Odd frequency- this program has an odd number of input frequency sysclk (X) frequency function)
- 2011-08-01 12:37:42下载
- 积分:1
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using VHDL prepared by the LED display driver circuit design source
用VHDL语言编写的LED显示器驱动电路的设计源程序-using VHDL prepared by the LED display driver circuit design source
- 2023-07-22 14:55:03下载
- 积分:1
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VHDL-Code-For-Full-Adder-By-Data-Flow-Modelling
VHDL Code For Full Adder By Data Flow Modelling
- 2013-11-08 00:39:04下载
- 积分:1
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line_four
利用verilog HDL逐点比较法实现直线和圆弧插补(Use verilog HDL by-point comparison method to achieve linear and circular interpolation)
- 2020-12-01 14:59:27下载
- 积分:1
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ISE
设计一4位比较器,画出门级电路图,用verilog语言完成设计。
(Design a four comparators, drawing out level circuit diagram, complete the design using verilog language. )
- 2015-12-11 21:16:12下载
- 积分:1
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xilinx of ddr sdram controller documentation
xilinx的ddr sdram控制器文档-xilinx of ddr sdram controller documentation
- 2023-04-17 06:40:03下载
- 积分:1
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latticeECP3-serdes-test-code
lattice ECP3系列高速FPGA serdes测试代码(lattice ECP3 series high speed serdes test code)
- 2021-03-25 01:39:14下载
- 积分:1
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verilog to write a telephone billing program
verilog 写的 电话计费器程序-verilog to write a telephone billing program
- 2023-01-29 16:55:03下载
- 积分:1
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DDS
可以产生正弦波,三角波、锯齿波、方波,要求频率1Hz-100kHz,步进1Hz,具有自动扫频功能;
正弦波的相位可调,方波的占空比可调;
(Can generate sine wave, triangle wave, sawtooth wave and square wave, the required frequency of 1 hz- 100 KHZ, step 1 hz, with functions of automatic frequency sweep
The phase adjustable sine wave, square wave duty ratio is adjustable )
- 2021-05-07 02:58:36下载
- 积分:1