用vhdl语言编写的基于FPGA的波形发生器。对于做实验需要产生的波形非常有用。...

能够绘制数字电路的时序图，是fpga工程师时序设计和分析的神器(for digital circuit timming design and analysis)

基于 hdl语言的re232通信实验的设计，程序简单明了，一学就会(rs232 communication)

利用FPGA实现硬件的VHLD语言的Manchester code。(Hardware implementation using FPGA VHLD language Manchester code.)

DW8051单片机的设计，用HDL设计，详细的HDL设计-DW8051 microcontroller design, HDL design, detailed design of the HDL

Verilog HDL编写的串并转换。采用iout类型口。包含源文件和测试文件。用Modsim编译。-Verilog HDL Series and the preparation of the conversion. I used iout types. Includes source and test papers. Modsim compiler used.

说明：  基于PCF8591数模转换和DDS技术的信号发生器系统设计(Design of Signal Generator System Based on PCF8591 Digital-to-Analog Conversion and DDS Technology)

256字节深度的RS232串口程序,共分4个模块,顶层文件FIFO程序串口收和串口发.经过测试已用于产品.可靠!-Depth of 256-byte Serial RS232 procedures, divided into four modules, top-level document procedures FIFO serial and serial-fat collection. After the test has been used in products. Reliable!

TCM编码的调制端，采用8PSK，2/3码率的卷积码的matlab程序(TCM coded modulation client, using 8PSK, 2/3 code rate of convolutional codes of matlab program)

利用IIC接口的4路 ADC max1037，采集思路信号，通过在FPGA内部的构建DeltaSigma DAC软核，在VGA液晶显示屏上显示波形。 (IIC interface 4-way ADC max1037, collecting ideas signal the FPGA internal build DeltaSigma DAC soft-core VGA LCD display waveforms.)

VHDL fft 源程序，直接运行就可以，很好的一个程序-VHDL fft source code can be run directly, a very good program