Dcache设计

使用verilog hdl语言编程正弦波信号，能仿真出结果(Can use verilog HDL language programming sine wave signal, the simulation results )

利用DE0nano开发板实现了对用的卷积神经网络(The CNN algorithm is implemented.based FPGA)

实现千兆以太网数据发送，通过GMII接口向PHY写数据，控制PHY发送数据。(Implementation of Gigabit Ethernet data transmission, write data to the PHY through the GMII interface, control PHY data.)

正弦信号发生器，用VHDL来完成，抗干扰能力较强，(Sinusoidal signal generator, using VHDL to accomplish, a strong anti-interference ability,)

SOPC系统的I2C代码 直接可用，可作为ＩＰ核用到自己的系统中(SOPC system I2C code directly available, can be used as an IP core in your system)

针对QUARTUS的DMA的VHDL代码实现(DMA Controller Code in VHDL)

基于VHDL实现（7，4）汉明码的编码器和译码器(VHDL-based implementation (7,4) Hamming code encoder and decoder)

简单的以太网例程,verilog语言,vivado环境

脉动乘法器：一个GF(2m)域上的Digit-Serial 脉动结构（Systolic）的乘法器(Pulse Multiplier: a GF (2m) domain on the Digit-Serial pulsation structure (Systolic) the multiplier)

嵌入式的LCD的图片显示程序，是LCD最好的资料。(Embedded LCD picture display program is the best LCD data.)