nand 闪存仿真模型

用FPGA实现OFDM系统，硬件语言为Verilog，环境为xilinx，详细介绍了接收机和发射机各个模块的源代码(OFDM system with a FPGA implementation, hardware language Verilog, environment xilinx, details of receiver and transmitter modules source code)

说明：  用VHDL语言实现电子钟(Using VHDL language electronic bell)

VHDL语言编写的I2C通信接口,可与单片机等MCU相连,只占用很少的引脚线完成数据的传输(Written in VHDL I2C communication interface, such as MCU and MCU can be connected, only takes a few lines to complete the data transmission pin)

ads1255 spi verilog驱动,已测试过，可以使用。

说明：  图像边缘检测，图像中值滤波和MATLAB处理(Digital Image processing based on FPGA)

RobustVerilog生成verilog工具(RobustVerilog version)

可以给VHDL初学者看的实例，全部经过验证(VHDL beginners can see examples of all the proven)

基于Basys3的数字钟实例，主要用于Basys3、vivado开发环境入门。源码使用VerilogHDL(Based on digital clock instance Basys3, mainly for Basys3, vivado development environment started. Use Code VerilogHDL)

说明：  本资源有一个matlab程序段，是仿真BPSK分别在高斯噪声和瑞利衰落下的误码率，产生图形对仿真值和理论值进行比较(This resource has a matlab program segment, which is the bit error rate of simulated BPSK under Gaussian noise and Rayleigh fading respectively. The generated graph compares the simulated value with the theoretical value.)

VHTL PROGRAMMING COURSE