FPGA simulation examples, Verilog coding, the process in detail, code easy to un...

基于DDS的BPSK调制器设计Verilog源码( U57FA u4E8.08 u868)

verilog 简易频率计的设置，包括整个工程(verilog simple frequency meter settings, including the entire project)

采用VHDL英特尔8085微处理器的设计

State.Machine.Coding.Styles.for.Synthesis（状态机，英文,VHDL）-State.Machine.Coding.Styles.for.Synthesis (FSM, English, VHDL)

上传的是基于Xilinx的新出的开发板Zedboard的一个简单的知道文档，希望对有关同学有所帮助。(Uploaded a simple know the document based on Xilinx' s new development board Zedboard the hope that some of the students to help.)

A controller for DDR2 on FPGA with vhdl, content testbench, model and textfile-generation/data-detection using python.

FPGA在直流电机调速中的应用,利用fpga进行PID闭环控制(tell us speed control for DC motor by FPGA,use fpga for PID circle control)

密码锁verilog源代码，包括四个七段数码管显示模块，设置密码以及输入密码校验模块(Password lock Verilog source code, including four of seven digital tube display module, set the password and password verification module)

四轴动力模块，用一个顶模块控制，输入有：油门（20档）；指令；水平仪控制指令，4个输出口(Axis power modules, with a top module control inputs are: accelerator (20 files) instruction Level control instructions, four output ports)

说明：  SDRAM硬件控制,fpga的verilog语言，适合学习(SDRAM hardware control, Verilog language of FPGA, suitable for learning)