内嵌BRAM设计LIFO堆栈

c54x的VeriLog程序代码 也是opencoreip-C54x is the Verilog code opencoreip

PIC单片机学习软件及其资料，入门到精通(PIC MCU learning software and its information, entry to proficiency)

German REAL LPT! USB2LPT

说明：  verilog实现的FFT变换，经硬件测试其功能与Altera的FFT IP核相近(verilog implementation FFT transform, through hardware, test its functionality with Altera' s FFT IP core similar to)

为了便于计算结果在FPGA中后续的计算和ip核中的调用，本代码输入信号为普通浮点型数据，输出为32位表示的浮点型数据。

数控机床 多轴插补原理积分算法，实现s曲线加减速原理(Numerical control machine tool multi axis interpolation principle, integration algorithm, to achieve the S curve acceleration and deceleration principle)

DCT and Idct with vhdl and verilog

Altera DE2 上使用 vhdl 语言设计 RS232 控制器。这是一个串口模块可用于嵌入系统。

用于测试ACEX1k30的流水灯程序，晶振频率为20mhz。运行环境Maxplus2-for testing the water ACEX1k30 lights procedures, the frequency of 20MHz crystal oscillator. Operating environment FLEX10K

uart implementation and documentation, this describes the basic steps in building your own uart module on verilog and programming them on an fpga device