Xilinx V5 FPGA详细规格、编程FPGA参考，系统设计…

并串转换模块，内含有另个.vhd文件。一个是自己写的比较简单 另一个是参考的。-And the string conversion module, which contains another one. Vhd file. One is its relatively simple to write the other is the reference.

W elcome to X CELL, the new Xilinx customer newsletter. By sending us your development system registration card you automatically became n charter subscriber to this quarterly publication. It is our intent to make this an informative, easy to read, responsive and-hopefully- interactive newsletter. We want to supply you with early and correct information, tell you about the status of our products and about our plans, about bugs and their workarounds, give you applications ideas and convey to you some of the en thusiasm that we feel for our Programmable Gate Arrays. If you have questions or suggestions, please send them to me. II Letters to the Editor make a newsletter more lively. Peter Alfke, Editor

该源码表述了ecc算法如何用vhdl实现RSA（Ron Rivest，Adi Shamir，Len Adleman三位天才的名字）一样，ECC（Elliptic Curves Cryptography，椭圆曲线密码编码学）也属于公开密钥算

uart16550 ip core 通用异步收发器vhdl源代码-uart16550 ip core UART VHDL source code

不错的介绍verilog的电子文档，对于入门级的新手有不错的参考价值-A good introduction to verilog electronic documents, for the novice there is a good entry-level reference value

32位存储器Verilog附带test文件，可以在modulesim仿真 还有加法、减法器，译码器等常用Verilog器件，都附带仿真test。(Memory test with Verilog)

说明：  十进制到十六进制转换的程序。程序要求从键盘取得一个十进制数，然后把该数以十六进制的形式在屏幕上显示出来。(Decimal to hex conversion program. Procedural requirements to obtain a decimal number from the keyboard, and then the hexadecimal number to be displayed on the screen.)

实现的电子钟，资料非常全面，是一次课程设计的大作业，完成的质量很高。(Achieve the electronic clock information is very comprehensive, curriculum design job, completed high quality.)

8位大小比较器的VHDL源代码，Magnitude Comparator VHDL description of a 4-bit magnitude comparator with expansion inputs-eight compared with the size of the VHDL source code, Magnitude Comparator VHDL description of a 4-bit magnitude comparator inputs with expansion

MATLAB辅助设计数字滤波器源代码，QUATUS II 实现！(MATLAB-aided design of digital filter source code, QUATUS II implementation!)