-
DE2 will connect to the LCD layout for Terasic off technology companies attached...
DE2将连接到LCD布局上,为Terasic off技术公司附上系统代码
- 2023-02-16 06:25:03下载
- 积分:1
-
concurrent
VHDL operators basics
- 2013-09-10 14:44:51下载
- 积分:1
-
UC1676C
51单片机测试程序,IC:UC1676,4线串口(51 MCU test program, IC:UC1676 4-LINE, SPI INTERFACE)
- 2020-10-17 11:17:28下载
- 积分:1
-
PCIeData-Link-Layer-Specifications
PCIe数据链路层的协议详解,对做PCIe接口有非常重要的指导价值。(PCIe data link layer protocol detailed, do PCIe interface very important value.)
- 2012-08-31 12:33:15下载
- 积分:1
-
CycloneIIFPGA chip
基于cycloneIIFPGA芯片Ep2c5t144c8的解调程序,用VHDL语言生成-CycloneIIFPGA chip-based demodulation Ep2c5t144c8 procedures, using VHDL language generation
- 2023-05-02 05:35:04下载
- 积分:1
-
08_4_hdmi_loop
HDMI做为视频输出输入接口已经广泛使用很长时间,主要通过TMDS差分编码传输。本实验通过在HDMI屏幕上显示彩条和输入输出环通实验,来练习视频的时序和视频颜色的表示,为后面视频处理实验做个基础。(HDMI as video output input interface has been widely used for a long time, mainly through TMDS differential coding transmission. In this experiment, by displaying color bars and input/output loop experiments on HDMI screen, video timing sequence and video color representation are practiced to lay a foundation for video processing experiments later)
- 2020-06-17 09:00:02下载
- 积分:1
-
ads7809
ADS7809是Burr-Brown公司推出的高精度AD采集芯片。它采用5V单电源供电,内含16位
逐次逼近寄存器,采样精度高,功耗小。
用Verilog实现其配置(ADS7809 is a Burr-Brown Introduces High Precision AD capture chip. It uses a single 5V supply, with 16-bit successive approximation register, sampling and high precision, low power consumption. To achieve its configuration with the Verilog)
- 2021-04-05 17:09:03下载
- 积分:1
-
点阵汉字显示的VHDL原程序.综合实验课程的程序,完全可以用的 希望大家支持啊...
点阵汉字显示的VHDL原程序.综合实验课程的程序,完全可以用的 希望大家支持啊-Dot-matrix characters shown in the original VHDL program. Comprehensive experimental program procedures, can be used to hope you will support the ah
- 2022-03-25 16:49:49下载
- 积分:1
-
This book is on the Xilinx
这本书是关于Xilinx公司开发的ISE工具的中文教程,适合于初学FPGA设计的人使用,全书内容丰富,共包括9章,通过此书的学习可以了解并掌握FPGA的设计流程及设计方法。-This book is on the Xilinx
- 2022-05-14 07:46:13下载
- 积分:1
-
Source code for asyn_fifo using verilog language.
异步FIFO 设计源代码,内涵完整的verilog源代码和测试代码。-Source code for asyn_fifo using verilog language.
- 2022-04-14 15:20:53下载
- 积分:1