xilinx the frequency generator VHDL source code, spartan3 can run in the learnin...

DDS的VHDL源代码，是数字QPSK调制解调中的重要组成部分。(DDS of the VHDL source code, the number of QPSK modulation and demodulation is an important part.)

E1 (FIRST ORDER EUROPE TRANSMISSION STANDARD)qw

FPGA按键延时模块，产生key_value和key_flag 可直接例化调用(The key delay module of FPGA)

本程序使用vhdl编写的jtag接口实现程序,其中有些功能未能实现,希望有人能够帮忙完善!-vhdl the procedures used to prepare the jtag interface procedures, which some of them did not materialize, hope someone can help perfect!

以GPS为时间基准，实现多传感器器数据同步采集，整合信息后发送 VERILOG语言编写 QUARTUS II环境(GPS-time basis, synchronized multi-sensor data acquisition, integration of information after sending VERILOG language environment QUARTUS II)

其中包括AD9226的原理图和应用程序，可以参考完成其他编程(Including AD9226 schematics and applications, you can refer to complete other programming)

关于FFT算法的FPGA实现（源码），数字信号处理不可少。-FFT algorithm on the FPGA implementation (source code)

fpga控制da产生幅值频率可调的正弦波程序(the fpga Control da produce the amplitude adjustable frequency sine wave program)

This is a bridge IP core to interface the Tensilica PIF bus protocol with the OpenCores WishBone. It currently supports single-cycle as well as burst transfer operations. The core has been tested in a master-PIF slave-WB configuration.-This is is a bridge IP core to interface the Tensilica PIF bus protocol with the OpenCores WishBone. It currently supports single-cycle as well as burst transfer operations. The core has been tested in a master-PIF slave-WB configuration.

探索集成太阳能energyharvesting作为动力源用于低功率系统，energyscavenging基于无源像素结构，在CMOS光电二极管的阵列imagershas已经制造一起在一个0.35-米本体工艺利用机chipinterconnect实现存储电容器。集成的垂直板capacitorsenable密集的能量储存在不限制光学效率。测试wereconducted既具有白色光源和绿色激光。 Measurementsindicate是225 W /毫米。          的fullyintegrated存储电容器的能量密度是不与系统级packagesolutions如超级电容器或电池可印刷有竞争力，甚至与缩放ITRS蓝图的tothe结束。然而，对于应用具有非常低energystorage要求或成本限制，限制系统inpackageintegration，利用互连寄生电容用于储存可aviable溶液。和机器人的利用太阳能的光控制，如果光fromeast方向，机器人将在向前方向上移动，如果光fromwest方向，机器人将在相反的方向移动。电池文本框：电池SOLAR细胞平行四边形：SOLARCELLSLDR文本框：LDR机器人文本框：机器人集成太阳能energyscavenging和存储的组合，可以使一个新的发电成本低，寿命长，小体积的系统对于将来的无线传感器网络或RFID应用程序。对于25毫米的总面积的光电二极管组成的3二极管串联的themetal存储电容对并联连接的，D1，D2和D3can供给足够的能量，用于DSP分别产生687，745和903 outputsamples每个二极管。本文介绍的光电二极管的阵列，仿照aftera被动像素成像器，具有在acommodity CMOS工艺存储电容器集成在一起。