xilinx the frequency generator VHDL source code, spartan3 can run in the learnin...

说明：  XC7A35TCSG324-1的Verilog频率计程序，支持十分频，支持切换内外信号输入(Verilog frequency meter program of xc7a35tcsg324-1 supports decadal frequency division and switching internal and external signal input)

Hynix公司8M Byte SDR SDRAM的Verilog语言仿真实现-Hynix" s 8M Byte SDR SDRAM Simulation of the Verilog language

本白皮书探讨了在PCI Express的因素 技术可能会影响性能。它还 提供指导如何估算 的系统性能。(This white paper explores the factors in PCI Express technology may affect performance. It also provides guidance on how to estimate the system performance.)

八位并行数据转换为串行数据依时钟信号串行输出(Eight bit parallel data to serial data)

usb读取，仅供参考，在实际应用中要更改以下数据。(Read usb data)

说明：  彩条产生程序。。。。720p需添加74.25M时钟(colorbar generation. need 74.25mhz clock if 720p gen)

说明：  实现基于黑金开发板的实时时钟功能，显示时分秒(Realize the real-time clock function based on black gold development board, display time, minute and second)

简易函数发生器，能产生正弦波，三角波，梯形波，方波，并且可调频率和幅度值。(Simple function generator can produce sine, triangle wave, trapezoidal wave, square wave, and the adjustable frequency and amplitude values.)

verilog的入门级别的例子（转载）-Verilog entry-level examples (reproduced)

VerilogHDL.自动增益控制模块中产生控制电压的部分-VerilogHDL. Automatic Gain Control Module have some control voltage