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Study_Test
说明: 实现简单的硬件加法器、除法器,实现源码文中注释(Realize simple hardware adder and divider, realize source code)
- 2020-06-21 05:20:01下载
- 积分:1
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ste_svpwm
实用Verilog编写的SVPWM程序,产生出SVPWM波形,可用于实现同步电机或者异步电机的空间矢量控制算法。(Practical Verilog of SVPWM written procedures, resulting in the SVPWM waveform can be used to implement the space vector control algorithm of the synchronous motor or induction motor.)
- 2021-04-18 16:58:52下载
- 积分:1
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concurrent
VHDL operators basics
- 2013-09-10 14:44:51下载
- 积分:1
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Buzzer-music
基于FPGA实现蜂鸣器播放音乐的功能
使用芯片为EP2C8Q208C8N,使用普通蜂鸣器,由于频率不同可实现放歌功能,本例设计的是《友谊地久天长》,使用Verilog语言编程,本例子有工程文件、仿真、波形,经过测试可以使用。(Play music based on FPGA buzzer functions using chip EP2C8Q208C8N, using ordinary buzzer, since the frequency of different functions can be realized sing, in this case the design is " Auld Lang Syne" , using Verilog language programming, this project examples files, simulation, waveform, tested can be used.)
- 2016-07-05 16:15:13下载
- 积分:1
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乐曲硬件演奏电路设计的全部VHDL代码,在QuartusII环境下编译通过,已存在QuartusII项目...
乐曲硬件演奏电路设计的全部VHDL代码,在QuartusII环境下编译通过,已存在QuartusII项目-err
- 2022-02-26 18:04:41下载
- 积分:1
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fir滤波器,Verilog语言写的,容易看懂
fir滤波器,Verilog语言写的,容易看懂-fir filter, Verilog language written in easy to understand
- 2023-03-26 01:30:04下载
- 积分:1
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05_key_test
说明: 利用FPGA实现对外设按键的控制,例如用户库用按键控制跑马灯的效果(FPGA is used to realize the control of external keys, such as the effect of user database using keys to control the running horse lamp)
- 2020-06-16 10:00:11下载
- 积分:1
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AD9648_ver
FPGA通过SPI总线配置AD采集芯片AD9648的程序,Verilog实现 (FPGA configuration via SPI bus chip AD9648 AD acquisition procedures, Verilog realization)
- 2013-09-27 17:28:14下载
- 积分:1
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基于VHDL的I2C程序0005,很不错的论文及程序,,大家快下啊
基于VHDL的I2C程序0005,很不错的论文及程序,,大家快下啊-based on the I2C procedures VHDL 0005, a very good paper and procedures, we quickly under ah
- 2022-03-18 17:11:42下载
- 积分:1
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VMD642_CPLD
本例程位于 VMD642_CPLD目录中。
使用 CPLD 实现辅助译码、LED 指示灯控制、看门狗等各种逻辑控制电路。源程序使
用 Verilog HDL书写,编译开发系统使用 Cypress公司的 Warp 6.3。(This routine is located VMD642_CPLD directory. Using CPLD implementation auxiliary decoding, LED indicator control, watchdog, and other logic control circuitry. Written using Verilog HDL source code, the compiler development system using Cypress' s Warp 6.3.)
- 2013-09-13 13:59:52下载
- 积分:1