基于alteraCPLD芯片的VHDL点阵滚动显示源代码

基于FPGA，利用VHDL语言对小车循迹进行设计。(Car tracking)

this is verilog code for designing ALU in fpga.

fpga code for pong game

嵌入式系统的乘法器试验报告 包括源代码 用VHDl语言编写-Embedded System multiplier test report including source code language used VHDl

实现ITU-BT1120数字并行接口的编码和解码(decode and encode ITU-BT1120 parallel digital interface)

说明：  在Xilinx环境下编写的vhdl程序，实现推箱子的游戏任务，界面很漂亮。(Xilinx environment in the preparation of the VHDL program, realized the game viewing tasks, the interface is very beautiful.)

说明：  4位二进制加法计数器的两种不同VHDL的描述,与比较。(4-bit binary addition of two different counter VHDL description, and more.)

FPGA来实现数据采集，AD采用TI公司的THS1206，高速并行AD，内含16字FIFO，降低硬件复杂度。(FPGA to realize data acquisition, AD using TI company s THS1206, high-speed parallel AD, containing the 16-character FIFO, to reduce hardware complexity.)

在quartus平台下使用verilog语言编程实现简单的单流水线CPU，可以执行16条基本指令(Quartus platform in the verilog language programming using a simple single-line CPU, can perform 16 basic instructions)

VHDL fft 源程序，直接运行就可以，很好的一个程序-VHDL fft source code can be run directly, a very good program