用VHDL语言设计分频器，主要是因为一些子

VHDL的寄存器读写参考，可自己根据要求重新修改，本示范只做参考用-Register read and write VHDL reference to their request to amend in accordance with, the reference model only

本程式為使用Verilog語言寫控制DRAM的控制模塊, 可以簡易的控制DRAM IC, 本程式已經過系統驗證.(program for the use of the Verilog language to write the control of DRAM control module, be easy to control DRAM IC, the program has been systematically verified.)

用FPGA实现dct变换。verilog语言实现，在quartus9.0中验证，含整个工程(dct transform verilog language in quartus9.0 verify, with the entire project)

FPGA实现SPI接口的从机功能，接收和发送全双工运行，接收到的数据以八位LED灯显示(FPGA to achieve the SPI interface the machine function, receive and send full-duplex operation, the received data to eight LED lights)

this project is about FIR FIlter By VHdl codes in the ISE.

FPGA-based high-speed image acquisition system

周立功Verilog HDL黄金参考指南，学习VerriLog的东西。-Golden Week Ligong Verilog HDL reference guide, learning VerriLog things.

viterbi译码器的IP核，可以直接编译使用-viterbi decoder IP core, the compiler can directly use

本示例为基于FPGA红色飓风一代IDS-EP1C6/12开发板的USB传输，实现了pc端接收来自FPGA开发板的数据，并显示条纹，具体使用说明见解压后的说明文档。(This example is based on red hurricane generation FPGA development board' s USB transfer IDS-EP1C6/12 realized pc client receives the data from the FPGA development board and display stripes, detailed instructions, see the documentation after decompression.)

说明：  ilx554b型号CCD积分时间程序的设计，包括两座控制信号(program for ilx554b,the driver include two parts single)