This procedure for the serial communication procedures, the use of Verilog langu...

说明：  基于FPGA的OFDM同步，包含时钟模块、ROM读取模块、峰值检测模块、帧同步模块(OFDM synchronization based on FPGA includes clock module, Rom reading module, peak detection module and frame synchronization module)

工程实用观点，简单介绍集成电路的传统设计语言现状。(Practical engineering point of view, the traditional integrated circuit design brief language status.)

现在最流行的RTL设计方法之一，本书为全球流行的设计入门书籍(One of the most popular RTL design methods nowadays, this book is an introductory book for popular design all over the world.)

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多倍（次）分频器 请注意: 本例的各个源描述的编译顺序应该是: 52_divider.vhd 52_divider_stim.vhd (Times (times) divider Please note: This case is described in various sources to compile the order should be: 52_divider.vhd 52_divider_stim.vhd)

华莱士树乘法器，运用了华莱士树状结构和布斯算法，提高了速度(The Wallace tree multiplier uses the Wallace tree structure and the Buss algorithm to increase speed)

说明：  AXI4-Lite总线的主从机读写，例程及代码(AXI4-Lite Bus Host-Slave Read-Write, Routine and Code)

actel flash rom使用 actel flash rom使用(actel flash rom actel flash rom)

利用FPGA设计游戏设计，真人版超级玛丽，VGA显示(Using FPGA design game design, live-action version of Super Mario, VGA display)

Verilog HDL编写的总线功能模型，十分有用，需要的下载-Verilog HDL prepared by the bus functional model is useful, it needs to download