This procedure for the serial communication procedures, the use of Verilog langu...

32位扰码器的verilog代码，编译通过(The Verilog code of 32_bit scrambler)

mc8051 很好的学习资料 官网的绝对权威-mc8051 a good learning materials in absolute authority of the official website

Verilog HDL数字系统设计项目，频率可调的任意波形发生器，可以输出正弦波、方波、三角波和反三角四种波形(Verilog HDL digital system design projects, adjustable frequency arbitrary waveform generator can output sine wave, square wave, triangle wave and the anti-triangular four waveform)

基于DVI协议动态全彩LED大屏幕发送卡设计与实现,成本比较低,效果很好,可以实现高清视频(Dynamic full-color LED large screen based on the DVI protocol send a card design and relatively low cost, good effect, and can achieve high-definition video)

正弦信号发生器（可扫频）通过验证 正弦信号发生器-Sinusoidal signal generator (which can be swept) through the validation of sinusoidal signal generator

ALTERA FPGA CLPD

原创：cos函数和sin函数的VHDL实现，很实用(cos of the VHDL implementation)

自适应滤波，对输入信号进行选择性的加权处理，使输出达到最优化，并且能够跟踪和适应系统和环境的动态变化(Least mean square，of the input signal processing, selective weighted output, and optimize can track and adapt to the dynamic changes of the system and environment)

半带滤波器，用于sigma-delta DAC中的设计(Half-band filter for sigma-delta DAC design)

JOP的RAM VHDL源码，经典的经典，不易找到的好东东，-JOP of RAM VHDL source code, classic classics, difficult to find a good price.