This procedure for the serial communication procedures, the use of Verilog langu...

基于FPGA的PWM控制器设计，包含ADC0820模块，按键扫描，PID，PWM控制器等模块，VHDL语言完成，已仿真通过(PWM controller design based on FPGA, including ADC0820 module, key scan, PID, PWM controllers and other modules, VHDL language completed, through simulation)

Fully parametrizable combinatorial parallel LFSR/CRC module. Implements an unrolled LFSR next state computation. Includes full MyHDL testbench.

VHDL语言100例详解，北京理工大学ASIC研究生出版，这里是51~94个examples-VHDL language of 100 cases explain, Beijing Institute of Technology, Graduate ASIC publication, here is the 51 ~ 94 examples

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altera max10 USB demo，使用了phy，把开发板配置成U盘模式(altera max10 USB demo，using PHY device，design a U pan)

应用背景弗鲁托PA oscilar就像联合国领导是卡瓦依，zholo罗该为什么我需要一个接着一个普通该estudielo为什么deberia darselo masticado关键技术zh0lo VHDL l0ks，就像PA presumir Y阙我书房一个接着一个普通免费，但四sintetiza Y有她comportamiento寺特拉华入伍机构sincronizar O把一osiclar DOS LED

Verilog分频程序原理讲解及代码.偶数倍分频奇数倍分频的原理和方法(Verilog divide the program explain the principle and code an even multiple of odd multiple of the principle of divide and divide)

运行在FPGA上的Verilog程序(实现对ADC的控制)-Verilog procedures (the achievement of the control of the ADC)

VHDL语言，实现穿行数据接收的功能，将异步串口的数据转换为八位数据存储。

用verilog编写的分辨率提高的源代码 采用双线性插值(Written resolution with the verilog source code to improve the use of bilinear interpolation)