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FPGA_5
无SDRAM的PCI采集,给出PCI采集的FPGA程序,桥芯片也为PLX9054,已验证通过(No SDRAM, PCI capture, given FPGA PCI acquisition program, bridge chips for PLX9054, has been verified by)
- 2015-01-07 22:57:46下载
- 积分:1
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硬件描述语言
verilog HDL 4×4矩阵键盘驱动程序包括硬件电路图-verilog
- 2022-04-27 04:55:21下载
- 积分:1
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raylrnb (3)
说明: 本资源有一个matlab程序段,是仿真BPSK分别在高斯噪声和瑞利衰落下的误码率,产生图形对仿真值和理论值进行比较(This resource has a matlab program segment, which is the bit error rate of simulated BPSK under Gaussian noise and Rayleigh fading respectively. The generated graph compares the simulated value with the theoretical value.)
- 2019-10-21 21:16:04下载
- 积分:1
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mux8to1_with_if
this code to input 8 different data and make them out sequentialy
- 2015-02-19 10:54:20下载
- 积分:1
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利用两个半加器来组成的全加器,是简单的vhdl语言入门
利用两个半加器来组成的全加器,是简单的vhdl语言入门-The use of two and a half adder to form the full adder is a simple entry-vhdl language
- 2023-08-01 03:35:04下载
- 积分:1
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Nexys-4-DDR-XADC
Nexys-4-DDR-XADC 开发板demo(Nexys-4-DDR-XADC e.v. Board demo)
- 2018-12-07 15:33:22下载
- 积分:1
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DES
说明: 自己写的DES的verilog实现。输入输出实现了并转串。(DES algorithm implemented in verilog.)
- 2020-12-03 16:19:25下载
- 积分:1
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SDC_RDC
基于FPGA的双通道旋转变压器测角系统硬件设计,分析的比较清楚。(FPGA based dual channel rotary transformer angle measurement system hardware design, analysis of the relatively clear.)
- 2011-08-07 20:23:10下载
- 积分:1
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半加器
它包含与试验台硬件描述语言(VHDL)一半加法器试验台意味着项目制造商宣布他要什么时候能给一个术语 请点击左侧文件开始预览 !预览只提供20%的代码片段,完整代码需下载后查看 加载中 侵权举报
- 2023-05-06 00:50:07下载
- 积分:1
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256M_sdram_OK
改自特权同学verilog语言写sdram测试程序;支持256M内存(verilog sdram )
- 2013-12-23 16:15:43下载
- 积分:1