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基于Altera DE2的数字跑表设计
将100Hz,产生6计数器的100ms,1s,10s,1min,10min的时钟,有
- 2022-04-09 11:32:45下载
- 积分:1
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hdl
网上流传的用来实现FPGA驱动VGA,从而实现一个pingpong小游戏的源码,实测可用。(a program embedded in a FPGA in order to drive the VGA and realize a little game named pingpong.
tested.)
- 2009-03-31 22:36:37下载
- 积分:1
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UART
说明: 串口通信vivado实现,带有仿真文件,可实现数据收发(the uart program based on vivado)
- 2020-07-02 16:15:57下载
- 积分:1
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用于FPGA的huffman算法的HDL编码
用于FPGA的huffman算法的HDL编码,包括VHDL及Verilog代码。可用于JPEG及MPEG压缩算法。(The huffman algorithm for FPGA HDL coding, including VHDL and Verilog code. Can be used in JPEG and MPEG compression algorithms.)
- 2008-08-01 17:25:44下载
- 积分:1
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moore-FSM
该程序描述并且模拟和实现了了一个摩尔有限状态机的功能和作用(The program describes the simulation and the function and role of a mole finite state machine)
- 2013-05-10 10:27:09下载
- 积分:1
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Three-Pulse-VSR-
对三相电压型逆变器的数学模型进行了详细的数学推导,简单容易理解(Three-phase voltage inverter for the mathematical model of a detailed mathematical derivation is simple and easy to understand)
- 2011-08-14 22:30:28下载
- 积分:1
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softdemodulation-of-8psk
讲述软解调很不错的一片文档,主要阐述的是8PSK的软解调FPGA实现,但对8PSK的软解调原理阐述很清楚,没有多余的东西,但需要注意其中各个调制符号点得顺序。(About soft demodulation of a document is very good, mainly on the soft 8PSK demodulation FPGA, but soft 8PSK demodulation principle describes very clearly, no extra stuff, but need to pay attention to the point where each modulation symbol was in order.)
- 2014-06-03 14:12:05下载
- 积分:1
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uart
说明: fpga串口收发完整程序,Verilog语言。(FPGA configuration PLL complete program, Verilog language.)
- 2020-06-20 17:00:02下载
- 积分:1
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This code is used for mpeg-2 encode,transform 188bit to 204bit(RS code)
- 2023-08-30 09:30:03下载
- 积分:1
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USB2.0的IP核(详细verilog源码和文档)
USB2.0的IP核开发.代码可以直接使用已经验证过(USB2.0 IP kernel development. Code can be used directly, has been verified)
- 2020-12-24 18:49:04下载
- 积分:1