二

Multisim11下8051跑马灯仿真。(The 8051 Marquee under Multisim11 simulation.)

微分器：利用数字锁相环进行位同步信号提取的关键模块(Differentiator: the use of digital phase-locked loop for bit synchronous signal extraction of key modules)

ac97 VHDL core

基于VHDL实现加扰器解扰器的设计，与仿真。(VHDL-based scrambler descrambler design and simulation.)

This is the Spartan 3E tutorial_02.

使用nios2点亮一个led灯，使用软件quartus13.0，开发板de2-115(nios2 led quartus13.0 de2-115)

说明：  使用VHDL实现的LED-80分组密钥，相对于其它密钥具有硬件实现面积更小的特点(vhd code of a lightweight block cipher LED-80)

实现同一个时钟输入,可以实现多分频,在一个时钟的驱动下-Realize with a clock input, can realize multi-frequency, in a clock-driven

加性高斯白噪声生成的VERILOG实现，包含所有的testbench文件。可直接使用(Additive white gaussian noise generated VERILOG realized, including all testbench files. Can be used directly)

企业用verilog代码风格规范 本规范规定了IC设计项目开发过程中VerilogHDL源代码的编写总则、要求及模板文件。(Enterprises with verilog code style guide for the preparation of this specification General IC design project development process VerilogHDL source code, requirements and template files.)