ip核的FFTverilog源代码，说明不是很具体

说明：  Verilog开发的，MII接口的百兆以太网UDP代码(100 megabit Ethernet UDP code of MII interface)

详细说明：基于xilinx ISE环境开发的VHDL的NAND flash ECC 实现,eccGen256Byte 文件夹为ECC 产生程序，EccErrLoc文件夹为ECC错误定位程序。

正弦波VHDL语言~~~ ~~~ ~~~`-Sine wave VHDL language ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ `

用VHDL写的交通灯控制源码，原创，希望对大家有所帮助-Use VHDL to write a traffic signal-controlled source, originality, and they hope to help everyone

16 bit switch input view in hexa format on 7seg display

伪随机m序列产生的VHDL语言程序- program in VHDL language for generating pseudo-random m sequence

说明：  Matlab to hdl code for Least_square testbench

多通道连续声发射数据采集，每个通道最大5M，采用verilog编程，内部用状态机。(Multichannel continuous acoustic emission data acquisition, each channel up to 5M, using Verilog programming, internal state machine.)

说明：  how to come ture a costas loop in FPGA with verilog,it is very useful on project

软件环境：TI的zstack协议栈 硬件：CC2530无线单片机 功能：利用超声波模块实现测距（该模块型号：HC-SR04 在淘宝上非常常见） 可测2厘米到3米距离(Software environment: TI' s zstack protocol stack hardware: CC2530 wireless microcontroller features: use of ultrasonic ranging module (the module Model: HC-SR04 on Taobao very common) can be measured 2 cm to 3 meters)