-
Features: Based on the VHDL language, realize high
功能:基于VHDL语言,实现对高速A/D器件TLC5510控制-Features: Based on the VHDL language, realize high-speed A/D control devices TLC5510
- 2022-11-12 08:45:02下载
- 积分:1
-
用Verlog HDL编写的数字钟程序,包含时,分,秒,进位,解码,扫描显示等功能。...
用Verlog HDL编写的数字钟程序,包含时,分,秒,进位,解码,扫描显示等功能。-Written by Verlog HDL ,a digital clock program, including hours, minutes, seconds, into the place, decoding, scanning display.
- 2023-02-05 04:55:03下载
- 积分:1
-
verilog设计点滴经验,对fpga设计人员很有好处
verilog设计点滴经验,对fpga设计人员很有好处-Experience in verilog design
- 2022-11-04 10:05:03下载
- 积分:1
-
Hoang_ha_PIC18_for_proteus.2
library of protues aaaaaaaa
- 2013-11-12 12:00:40下载
- 积分:1
-
McBSP_8bit_Asyn
基于FPGA的Mcbsp通信源码,经过项目实测检验(Mcbsp communication source code based on FPGA,Through the test of the project.)
- 2018-03-19 17:19:17下载
- 积分:1
-
systolic
脉动乘法器:一个GF(2m)域上的Digit-Serial 脉动结构(Systolic)的乘法器(Pulse Multiplier: a GF (2m) domain on the Digit-Serial pulsation structure (Systolic) the multiplier)
- 2020-11-13 10:39:43下载
- 积分:1
-
raylrnb (3)
说明: 本资源有一个matlab程序段,是仿真BPSK分别在高斯噪声和瑞利衰落下的误码率,产生图形对仿真值和理论值进行比较(This resource has a matlab program segment, which is the bit error rate of simulated BPSK under Gaussian noise and Rayleigh fading respectively. The generated graph compares the simulated value with the theoretical value.)
- 2019-10-21 21:16:04下载
- 积分:1
-
dma_ahb
挂靠在AMBA2.0的AHB总线上的DMA装置,用于直接发起数据传输。(Anchored the DMA devices the AHB bus AMBA2.0, for initiating data transfer.)
- 2021-03-29 21:49:10下载
- 积分:1
-
AVR IP CORE
可以直接用于工程的开发和
已经通过编译和仿真
AVR IP CORE
可以直接用于工程的开发和
已经通过编译和仿真-AVR IP CORE can be directly used for project development and has passed the compiler and simulation
- 2022-02-15 18:01:54下载
- 积分:1
-
here is gangadhar call by mailing me
here is gangadhar call by mailing me
- 2022-01-26 05:55:47下载
- 积分:1