给予MSP430F147的串口通讯程序,能帮助你了解MSP430系列单片机和串口通讯的基本方法...

VHDL语言编写的计数器程序，实现1到9999计数，并动态扫描显示，带清零和暂停功能，课上作业自编程序-VHDL language of the counter program to achieve 1-9999 counts, and the dynamic scan showed, with Clear and suspension of functions, classes, on a self-compiled programs

基于FPGA的DDS。可以产生三种波形：正弦，方波，三角波。频率分辨率0.012Hz。频率从0至25MHz任意可调。(FPGA-based DDS. Can produce three waveforms: sine, square, triangle wave. Frequency resolution 0.012Hz. Frequency is adjustable from 0 to 25MHz.)

说明：  具有计时 设置时间 闹钟 秒表 功能的数字钟设计 外设矩阵键盘(Digital clock design peripheral matrix keyboard with the function of timing setting time alarm clock stopwatch)

参数可配置的sequential 乘法器和booth 乘法器(verilog source code with configurable parameters for sequential multiplier and booth multiplier )

使用LPM_ROM的实际的例子-Use of practical examples LPM_ROM

FIR有限冲击响应下带通滤波器的构建及滤波器仿真（通过matlab和simulink两种方法实现）(FIR finite impulse response bandpass filter and filter simulation (via two methods matlab and simulink))

VHDL_APPOINTMENT TIME(Hẹn thời gian hiển thị LCD sử dụng ngôn ngữ VHDL)

HDB3编码通过verilog实现，通过modelsim仿真(HDB3 coding is implemented by Verilog and simulated by Modelsim)

自动打铃系统 附带时钟 定时打铃 整点打铃-Auto-play Ling System

中芯国际130nm库文件，在DC综合练习中可以使用，并能帮帮助理解库的含义-DC　Ｖｅｒｉｏｇ，已通过测试。 (SMIC 130nm library file, you can use in the DC Comprehensive Exercises, and help to help understand the meaning of the library-DC Veriog has been tested.)