xilinx 开发板程序，VGA控制显示

VHDL教程及源码,是新手入门的不二选择!-VHDL Tutorial and source code is the only option, beginners!

vhdl,七段数码管驱动程序，完成数字显示功能-vhdl, seven-segment digital tube driver, complete the digital display

this is verilog code for designing ALU in fpga.

this Code is in verilog HDL. This Code is for piplined processor with 4 opcode. this will work in three cycle latch, decode and exicute.. test bench for xilinx ise is laos given

基于FPGA的 温度传感器 DS18B20接口设计-FPGA DS18B20

TI DSP XDS100V3仿真器原理图Rev2.0(TI DSP XDS100V3 schematic Rev2.0)

verilog 编写的ldpc编码，含有两个文件(LDPC written by Verilog)

vhdl code for obtaining video output through vga port

异步复位状态机 -- State Machine with Asynchronous Reset -- dowload from: www.fpga.com.cn & www.pld.com.cn -asynchronous reset state machine-- State Machine with Asynchronou "s Reset-- dowload from : www.fpga.com.cn

基于 hdl语言的re232通信实验的设计，程序简单明了，一学就会(rs232 communication)