CORDIC旋转

yuv444 与yuv422相互转换verilog语言(yuv444 to yuv422)

VHDL operators basics

说明：  对fpga的学习有一点帮助，属于较为基础的部分(It has a little help to the study of FPGA, which belongs to the more basic part)

资源描述基于FPGA的13位Barker码的实现,用Verilog语言编写相关器，利用FPGA实现13位Barker码相关器，并对其用Modelsim仿真。

上海交大关于基于FPGA的DSCDMA的实现的毕业设计(Shanghai Jiaotong University based the FPGA DSCDMA, achieve graduation design)

用vhdl实现的booth算法乘法器，包含了multiplexer和rca adder，同时提供了一个测试文件，modelsim测试通过(Algorithm with a booth multiplier vhdl implementation, including a multiplexer and rca adder, while providing a test file, modelsim test pass)

FPGA与DSP的EMIF通信，EMIF的RAM这方面相应的程序(FPGA and DSP EMIF communication)

adc采集多路采集多通道基于dma的adc采集(ADC acquisition, multi-channel acquisition and multi-channel acquisition)

目前最新的OVL库，里面是标准的ASSERTION模块，支持VHDL刚Verilog，最近在做AXI协议验证的时候用到，分享下(The latest OVL(open verification library),including all standard module of assertions(VHDL and Verilog). It can be used into AXI Protocl Verification. Just share with you guys.)

基于FPGA的QPSK调制解调，正交调制输出，解调包括NCO,载波同步，定时同步。modelsim仿真实测通过。