EDA常用计数函数VHDL程序设计，减法计数器：可预置数：

说明：  用Verilog编写的简单的运算单元（ALU），可实现加、减、与、或、异或、非、左、右移等功能(Verilog prepared with simple arithmetic unit (ALU), can be add, subtract, and, or, exclusive-OR, non-, left, and other functions shifted to right)

rmii 以太网接口时序源代码，值得开发借鉴的哦(verilog hdl)

以太网控制器Verilog源码(含有MAC,MII接口)(Ethernet controller Verilog source code (including MAC, MII interface))

very good code for edge detection based on vhdl programming.

交通灯控制（VHDL）-Traffic Light Control (VHDL)! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! !

原理图输入法制作的32位加法器。。。。。。。。(adder32)

这里是apb总线设计代码。这个源程序是基于verilog语言设计的(Here is the APB bus design code. This source program is designed based on Verilog language)

高通滤波器的仿真（由matlab和simulink两种方法实现）源文件以及图片示例(Simulation of the high-pass filter (implemented by the two methods matlab and simulink) source files as well as images example)

利用Verilog编写一个交通灯控制电路，能控制两条路上红、黄、绿灯的变化，并且显示等待时间(Using Verilog HDL to design a traffic light control circuit. It can control the change of red, yellow and green lights on two roads, and display the remaining waiting time.)

verlog hdl无刷电机控制程序,已在modelsim仿真-verlog hdl brushless motor control procedures have been in ModelSim Simulation