De2 lcd1602显示器控制

利用Verilog HDL语言设计了出租车计费器，使其具有时间 显示、计费以及模拟出租车启动、停止、复位等功能，并设置了动态扫描电路显示车费和对应时间，显示 了硬件描述语言Verilog—HDL设计数字逻辑电路的优越性。(Design using Verilog HDL language a taxi meter, it has time display, billing and simulation taxi start, stop, reset and other functions, and set dynamically display scanning circuit and the corresponding time fare, shows the hardware description language Verilog-HDL design advantages of digital logic circuits.)

用vhdl语言生成锯齿波，数据可自行改变(Sawtooth wave with vhdl language generation, the data can change by itself)

经典的OV5642的verilog驱动程序(Verilog Driver of Classic OV5642)

rs422通信，此模块实现通信功能，使用Verilog语言(RS422 communication program, Verilog language, this module implements 422 communication function.)

EMP3064的开发板板，原理图，verilog例子，板子说明，规格书，全套资料(EMP3064 development board, schematics, Verilog examples, board instructions, specifications, a full set of information)

Based on SVPWM three-level inverter matlab simulation, It describes the application of load forecasting, EULER numerical analysis method.

说明：  URISC的RTL级设计，Verilog代码(Design: URISC RTL Verilog)

说明：  fpga实现相关滤波算法中的CSK算法，采用仿真的方式验证结果 fpga是xilinx 仿真工具是vivado2018.2 语言是verilog(The CSK algorithm is implemented in FPGA, and the results are verified by simulation FPGA is Xilinx The simulation tool is vivado 2018.2 Language is Verilog)

EGO1快速上手指南，适用于新手进行学习(EGO1 Quick Start Guide)

频移键控FSK的Verilog实现，带测试文件，并在FPGA开发板上成功验证(Frequency Shift Keying FSK the Verilog implementation, with the test file, and successfully verified in FPGA development board)