SPI FLASH的控制器，FPGA实现，VHDL

用组合逻辑实现循环除法器。稳定、安全、可靠。(Combinational logic loop divider. Stable, secure, and reliable.)

第十章的代码。 本书通过100多个模块实例，详细地讲解了Verilog HDL程序设计语言，全书共分13章，内容涉及VerilogHDL语言基本概念、建模、同步设计、异步设计、功能验证等，实例包括各种加法器/计数器、乘法器/除法器、编码器/译码器、状态机、SPIMaster Controller、I2C Master controller、CAN ProtocolController、Memory模块、JPEG图像压缩模块、加密模块、ATA控制器、8位RISC-CPU等及各个实例模块相应的Testbench，所举实例具有很强的实用性和代表性，每个实例均给出了介绍、功能分析、程序代码和结果演示(Chapter X code. This book by more than 100 module instance, explain in detail the Verilog HDL programming language, the book is divided into 13 chapters, covering basic concepts VerilogHDL languages, modeling, synchronous design, asynchronous design, functional verification, etc. Examples include a variety of additions device/counters, multipliers/dividers, encoders/decoders, state machines, SPIMaster Controller, I2C Master controller, CAN ProtocolController, Memory modules, JPEG image compression module, encryption module, ATA controller, 8-bit RISC-CPU etc. and the various instances of the corresponding module Testbench, The examples are highly practical and representation, each instance of it all gives the introduction, functional analysis, program code and the results demonstrate)

自己编写的红外解码子程序，但CPU资源占用较高，作教学示范用途。(prepared their infrared decoding routines, but higher occupancy CPU resources for teaching demonstration purposes.)

说明：  Implementing SMPTE SDI Interfaces with UltraScale GTH Transceivers

basic cpu design in verilog

机器人控制,用matlab robotics toolbox 仿真设计(robotics controll using matlab robotics toolbo simulation)

吠陀乘数

verilog例子资源，对于初学者很有帮助。-verilog examples of resources are very useful for beginners.

十分基础的CCD的测试程序，大家可以下载调试CCD(this is a ccd test chengxu ,it is very good to use ,you can down it )

this the for a equiripple filter-this is the for a equiripple filter