SPI FLASH的控制器，FPGA实现，VHDL

基于vhdl可用的数字频率计，误差较小，精准度较高。文件中还包含了与arm的通信模块、

良好的Coding Style能减少Bug，减少锁存器出现的可能以及其他隐藏逻辑错误，也有助于减小芯片面积或所用资源(Good Coding Style can reduce Bug, reduce the possibility of latches and other hidden logic errors, and also help to reduce chip area or resources used.)

SMbus通讯协议的Verilog程序段，已通过Moldesim的仿真，可用(Verilog program segment of the SMbus communication protocol, has been through the Moldesim simulation, the available)

cyclone3_handbook-datasheet

自己收集的VHDL例程代码，适合初学者学习用，希望能给大家带来帮助。-Collected their own routines VHDL code, suitable for beginners to learn, I hope we can help.

this a example for the LCD for altera FPGA cyclone ii EP2C8. implemented in verilog. tested using altera EP2C8 fpga

these are verilog files but i am uploading in text(notepad) format

高速串行设计FPGA-GTX IP设置生成，可动态配置速率2.4Gbps，1.2Gbps，0.6Gbps，自适应链接(High-speed serial design FPGA-GTX IP settings generated dynamically configurable rate of 2.4Gbps, 1.2Gbps, 0.6Gbps, adaptive link)

I am in need of some codes of HDL

simple code based on verilog shifter , cla ,clg , ALU , PC