Using VHDL programming asynchronous FIFO procedure can be run by the debugger

说明：  led blinking program.................

Xilinx 公司Spartan-6系列FPGA实现LVDS，带Modelsim仿真文件，已综合。(Xilinx Spartan-6 Series FPGA implements LVDS with Modelsim simulation file, which has been synthesized.)

中央空调的控制，3级控制系统，这个是中间控制的vhdl源代码-Central air-conditioning control, 3 control system, this is the middle of the control of vhdl source code

DSP与FPGA时序接口模块，已经经过测试，保证读写稳定(The Interface of DSP to FPGA)

可编程器件厂商Altera出品的8b10b编码器源代码(Giga8b10b v10)

说明：  本例的源描述超过了演示版限制的300行, 如果您需要对其进行编译与模拟,请与北京理工大学 ASIC研究所联系,获取Talent系统的完全版本. 联系方法: 电话:010-68912434 (The source described in this case than the demo version of the 300 line limit, if you need to be compiled with the simulation, please contact ASIC Institute of Beijing Institute of Technology to obtain the complete version of Talent system. Contact: Tel :010-68912434)

改写四号中断的 自己编的，，，，，，求过啊！！！一个很简单的小程序(Rewrite the fourth interruption of their series,,,,,, begged ah! ! ! A very simple little program)

VHDL源码 VHDL源码 -VHDL source VHDL source VHDL source

说明：  NCO生成原理接介绍、CORDIC算法原理介绍以及MATLAB与Verilog语言实现(Introduction to NCO generation principle)

一个交通灯设计,简单的实现，没有添加其他的显示管(Traffic Light System)