中央空调的控制，3级控制系统，这个是中间控制的vhdl源代码

Used for Time shifting discrete signals, it can do both integral and fractional sampling period delay. Original.

说明：  fpga的RS485代码,非常容易，适合学习(the code of rs485 in fpga, very easy,suitable for learning)

FPGA中FLASH配置控制源码,VHDL和Verilog(FPGA source code in the FLASH configuration control, VHDL and Verilog)

中值滤波算法的verilog实现，可用于相关算法在基于FPGA的嵌入式图像处理系统中。(Median filtering algorithm verilog realization available FPGA-based embedded image processing system.)

实现十字路口简单交通灯的verilog hdl源代码,可以实现-Realize a simple traffic lights at the crossroads of the verilog hdl source code, can be achieved

最近交互式电源技术，软交换、同步整流、频率固定(Alternating expressions Power technology recently、Softswitch, synchronous rectification, fixed frequency)

此论文想详细阐明了用FPGA做硬件处理，集成SOPC功能实现MVB通讯协议的解决方案，可以运行在alter fpga上面。(This paper expounds in detail the processing to do with FPGA hardware, integrated solutions for SOPC function of the realization of MVB communication protocol, can run in alter FPGA above.)

说明：  实现ARP、ICMP、UDP、TCP、IP和MAC全过程的传输，对TCP的连接、接收、发送、断开均经过测试，功能正常(Realize the transmission of ARP, ICMP, UDP, TCP, IP and MAC in the whole process, test the connection, reception, transmission and disconnection of TCP, and the function is normal)

An Alarm Project Writen in VHDL for FPGA Devices

Everspin SPI MRAM chipset(MR25H10,MR25H40,MR25H256)