AHB 总线协议

完整的OFDM仿真程序，包括QPSK,16QAM调制，基于MATLAB，各个步骤都有详细的说明。(OFDM simulation program, based on the complete MATLAB, every step is described in detail.)

低密度校验码 ，很好用的代码，功能已经实现编码和译码(fpga ldpc)

在PVI接收16位并行数字流（视频），其次是一个时钟信号（英尺= 29兆赫），小写字母

FPGA通过SPI总线配置AD采集芯片AD9648的程序，Verilog实现 (FPGA configuration via SPI bus chip AD9648 AD acquisition procedures, Verilog realization)

基于Max+Plus II和VHDL的电子密码锁设计(Based on Max+ Plus II electronic lock and VHDL design)

说明：  基于高清视频的3D人脸识别源代码，四万多行，经过FPGA实际验证，最近调试完毕。(The source code of 3D face recognition based on HD video, more than 40,000 lines, has been verified by the actual FPGA, and has been debugged recently.)

基于Verilog语言编写的LCD1602显示的日历程序，类似时钟功能值得参考。(LCD1602 shows calendar program based on Verilog language, similar clock function is worth reference.)

very good code for edge detection based on vhdl programming.

此代码完成了流水线CPU的设计。其中有ALU，控制模块，UART等verilog代码。(This code completes the design of pipelined CPU)

MVB架构流程图。MVB开发用，大连海天资料(MVB development, Dalian Haitian data)