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quartus环境下开发的三人表决器(三种不同的描述方式)maxplusII兼容...
quartus环境下开发的三人表决器(三种不同的描述方式)maxplusII兼容
- 2022-06-27 14:06:35下载
- 积分:1
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sanjose_hdlcon
FFT implementation using C program
- 2014-02-11 21:01:40下载
- 积分:1
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pin_lv1
一个简易的频率计,主要用检测在一定范围内的频率,当然频率过大会有误差(A simple frequency meter, mainly used for testing in a range of frequencies, of course, frequency of errors over the General Assembly)
- 2010-06-05 10:30:56下载
- 积分:1
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ag-overview
agilex fpga description
- 2019-05-13 18:21:04下载
- 积分:1
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svtb_ahb_sram
说明: 一款verilog设计的SRAM控制器,可以实现AHB总线控制的功能。(abcdefghijklmnopqrstuvwxyz)
- 2020-06-30 13:40:02下载
- 积分:1
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SPI_test
说明: 用FPGA于32进行SPI单向通信,FPGA向32放松发送数据(One-way SPI communication is carried out in 32 with FPGA, and data is sent to 32 with ease by FPGA.)
- 2020-06-18 10:40:02下载
- 积分:1
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chengxu_jieshou
nrf24l01发送代码,verilog实现NRF24L01通信(NRF24L01 send code, Verilog to achieve NRF24L01 communication)
- 2017-08-09 19:04:16下载
- 积分:1
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Write their own extensions clock, an increase of the year, month day time, veril...
自己写的扩展功能时钟,增加了年、月日计时,verilog代码,已在spatarn3实现。-Write their own extensions clock, an increase of the year, month day time, verilog code in spatarn3 realize.
- 2023-01-04 22:35:04下载
- 积分:1
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EDA常用计数函数VHDL程序设计,减法计数器:可预置数:
EDA常用计数函数VHDL程序设计,减法计数器:可预置数:-common counting function EDA VHDL programming, subtraction counter : Preset :
- 2022-03-25 01:33:15下载
- 积分:1
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2003101190493221
还好用,大家一起来看下,不错的图书管理软件啊 ,呵呵(Fortunately with, everyone look, the good library management software, ah, huh, huh)
- 2010-09-14 13:08:40下载
- 积分:1