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vhdl testbentch 编写模板。非常实用
vhdl testbentch 编写模板。非常实用-vhdl testbentch prepared templates. Useful
- 2022-06-01 04:30:54下载
- 积分:1
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This is the design of the divider module EDA. Can achieve three different freque...
此为EDA设计的分频器模块。可以实现三种不同的频率信号,可以通过使用者自由设置频率大小-This is the design of the divider module EDA. Can achieve three different frequency signals, users can freely set the frequency of the size of
- 2022-07-22 16:48:57下载
- 积分:1
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LCD12864
LCD12864的显示程序,使用的是verilog语言编写的显示程序,为PDF文档(LCD12864 display program, using Verilog language display program, as a PDF document)
- 2013-05-11 09:53:44下载
- 积分:1
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EDA常用双LED显示译码程序,将四位二进制数译码为七位对应于LED7位输入的高低电平信号...
EDA常用双LED显示译码程序,将四位二进制数译码为七位对应于LED7位输入的高低电平信号-EDA common dual LED display decoding procedure will be four binary decoding for seven LED7 spaces corresponding to the input signal circuits
- 2022-06-29 02:03:32下载
- 积分:1
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ADS8509
FPGA驱动高输入电压范围的ADS8509芯片,采样范围广,适合前端大信号处理(FPGA drive a high input voltage range ADS8509 chip, sampling a wide range, suitable for large front-end signal processing)
- 2015-08-10 22:03:59下载
- 积分:1
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8b10b
8b10b编解码,用于光通信和千兆以太网,verilog编写,已验证(8b10b codec for optical communications and Gigabit Ethernet, verilog prepared Verified)
- 2021-01-27 09:48:41下载
- 积分:1
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七人表决器
七人表决器,当有四人或四人以上的人同意是,表决通过。每个裁判控制一个开关,高电平表同意,在quartusII上用全加器来实现,当表决通过时,实验箱上的LED灯亮
- 2022-02-03 05:43:46下载
- 积分:1
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build a tv box on fpga cyclone 2
build a tv box on fpga cyclone 2
- 2022-03-10 23:00:00下载
- 积分:1
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7-5
基于FPGA的ip核FIR低通滤波器,实现滤波功能,简单好用(FPGA-based ip core FIR filter for filtering function, easy to use)
- 2020-10-05 11:47:38下载
- 积分:1
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32bit_add_exercise
32位全加器,另有一个采用流水线的版本,是基于verilog语言的,很实用,希望对大家有所帮助(32-bit full adder, while a pipelined version,code is based on verilog language, it is practical, we hope to help)
- 2016-07-19 14:31:17下载
- 积分:1