一组练习，关于VHDL的一些基础的知识和练习可以参考一些具体的问题...

占空比1：1的通用分频模块-1:1 generic-frequency module

DDS的VHDL源代码，是数字QPSK调制解调中的重要组成部分。(DDS of the VHDL source code, the number of QPSK modulation and demodulation is an important part.)

这是个的VHDL点亮LED的程序，大家一齐分享吧-This is a LED light up the VHDL procedure, let everyone together to share

vhdl语言，国外教材，数字信号处理算法(vhdl language, foreign materials, digital signal processing algorithms)

vhdl描述的显示代码 maxplus2开发环境-VHDL description of the display code development environment maxplus2

利用cordic实现直角坐标与极坐标的转换，用vhdl实现-use cordic achieve very Cartesian coordinates with the conversion, with vhdl achieve

多通道连续声发射数据采集，每个通道最大5M，采用verilog编程，内部用状态机。(Multichannel continuous acoustic emission data acquisition, each channel up to 5M, using Verilog programming, internal state machine.)

说明：  适合入门及进阶的100个VHDL练习题，从易到难(100 VHDL exercises for beginners and advanced students, from easy to difficult)

用VERILOG HDL实现的任意 频率分频器源代码，是一个通用的程序-With VERILOG HDL realize arbitrary frequency divider source code, is a generic procedure

一个在CPLD，EPM70128上实现的PWM控制源程序。-A CPLD, EPM70128 realize the PWM control on the source.