一组练习，关于VHDL的一些基础的知识和练习可以参考一些具体的问题...

NIOS II IDE 编程， LCD测试程序，仅供参考。-NIOS II programming IDE, LCD testing procedures, for information purposes only.

说明：  CC217编程序，verilog实现，串行输入串行输出(CC 217 program, to achieve Verilog, serial input serial output)

FPGA的卷积编码小程序，VHDL描述，参数为2，1，7.(2,1,7 cov with VHDL.)

数字钟蜂鸣器音乐——爱情买卖，很时尚的闹钟音乐代码，经测试，很有感觉。(Digital clock buzzer music- love trading, very stylish alarm clock music code, tested, great feeling.)

SPI总线硬件描述语言Verilog下的实现，含主模式和从模式的实现，经过仿真验证，可作为一个单独的模块使用(SPI bus under the Verilog hardware description language to achieve with the main mode and slave mode realization, through simulation, can be used as a separate module uses)

根据ASMD图设计验证冒泡排序算法。给出设计程序及时序仿真结果，含纸质报告。(According to the ASMD diagram design, verify the bubble sorting algorithm. Give the design procedure and the simulation result in time, including paper report.)

实现图像的中值滤波功能，文件里有效果展示(The realization of the median filter function of the image, the file has the effect of display)

通过凌阳16位单片机实现复读机的应用的程序。(By Sunplus 16-bit MCU repeater application process.)

用verilog hdl 硬件描述语言写的一个范例程序，led的，扩展性极强，欢迎大家下载使用。-Verilog hdl using hardware description language to write an example of the procedure, led, and highly scalable, welcome to download.

一个求反余弦的cordic算法，整个工程。包括仿真。可以直接打开。(An inverse cosine of the cordic seeking algorithms, the whole project. Including the simulation. Can be directly opened.)