随机数生成代码的Verilog，Xilinx FPGA

利用quartus II 软件采用verilog语言设计了一个sigmoid激活函数(this work is a sigmoid ,use verilog language)

The objective of the labs today is to give you a basic understanding of FPGA design and enough experience to begin your own FPGA design with the ISE 10.1 tools and the Xilinx Spartan-3A DSP 1800A Starter Kit.

基于verilog的cpri接口代码，支持各种速率自由切换，量产产品实际应用代码(Cpri interface based on verilog code, support various rate free switch, production products the actual application code)

说明：  sd卡读写，仿真模型，testbanch测试文件(sdcard read write and sdcard model)

模块vedic_2_x_2（A，B，C  ；）；

说明：  vivado入门使用介绍，初学者入门学习(vivado Instructional pdf)

说明：  VIVADO pl端文档 基于zynq 7020(vivado soc pl example text of zynq)

此为华远显示320*240LCD驱动程序，该程序也适用于带RA8806控制器的LCD(This is the Huayuan display 320* 240LCD driver, the program also applies with RA8806 LCD controller)

用Vrilog产生一个混沌信号，并用MATLAB仿真，画出波形。(With Vrilog generate a chaotic signal simulation using MATLAB, draw the waveform.)

VHDL语言实现VGA的显示彩条横条九宫格的功能。(VGA display color of the VHDL language bar Jiugongge function.)