任意波形发生器

清华大学电子课程设计：Verilog，QuartusII可正确运行，可下载到FPGA上，完成远程通信的整体任务，PC发数据，键盘输入运算符与运算数计算将结果显示在数码管上并返回给PC机，需异步串口调试软件(Verilog, QuartusII run correctly, can be downloaded to the FPGA, to complete the overall task of remote communication, PC send data, keyboard operators and operands calculation displays the results in digital tube and returned to the PC, to be asynchronous serial debugging software)

说明：  基于FPGA的USB接口设计，实现了USB与FPGA的通信(USB interface to FPGA-based design, implementation of the USB communication with the FPGA)

说明：  一种用verilog语言实现的霍夫曼压缩编码算法(Huffman compression implemented by Verilog)

It is Synopsys dmac controller databook

不错的Quartus II 与modelsim结合仿真简介笔记，较为适合初学者，希望对大家有帮助！()

制作16位流水灯，实现LED模块对于拨杆0和1的识别(Making 16-bit pipeline lamp to realize the recognition of dial rod 0 and 1 by LED module)

ldpc译码算法介绍及fpga verilog系统方案设计，包括log_bp算法、min_sum算法、scaling_min_sum算法等(introducing the ldpc code decoding algorithm and the related system design，including the log_bp,the min_sum and the scaling_min_sum)

前导零的计算 (Calculation of leading zeros)

说明：  FPGA接收串口UART发来的指令设定温度报警值，实时采集DS18B20温度传感器并显示，带报警功能(FPGA receives the instruction from UART, sets the temperature alarm value, collects and displays DS18B20 temperature sensor in real time, with alarm function)

应用背景原创VERILOG HDL 实现数据指令CACHE的操作，LRU替换算法，包括1路组相连和2路组相连，包含ISE工程文件，亲测可用，初学者必备关键技术采用verilog语言设计的ARM cache，包含tb文件，写回策略。LRU替换算法