简易数字钟程序（基于ALTERA quartusII）

verilog 写的工程，是个基于流水线的乘法器(verilog write the works, is based on a pipelined multiplier)

FPGA板上的锁存器PLL控制代码（verilog代码）(FPGA board latch the PLL control code (Verilog code))

Control with DAC conversion

说明：  8位大小比较器的VHDL源代码，Magnitude Comparator VHDL description of a 4-bit magnitude comparator with expansion inputs(eight compared with the size of the VHDL source code, Magnitude Comparator VHDL description of a 4-bit magnitude comparator inputs with expansion)

ofdm的发射链路和接收链路的Verilog源代码，包括长短训练序列的生成，导频插入，加cp，ifft。(Source code of transmission link and reception link of OFDM)

整合的OFDM调制解调方法，matlab文件，modelsim仿真(Integration OFDM modulation and demodulation method, matlab file, modelsim simulation)

led大显示屏发送卡代码，非常珍贵的，大家多多下载，和CODEFORGE网站共同发展，谢谢这个网站，这么多资源，对软件工程师真的是非常有用，再次感谢

UML2 apprendre a modeliser a l aide de UML

ARM m4 FPGA开发模块，用于 ahb2apb的模块接口(ARM M4 FPGA development module for ahb2apb module interface)

FPGA Implementation of QFT based Controller for a Buck type DC-DC Power Converter and Comparison with Fractional and Integral Order PID Controllers