实现控制8x8点阵动态显示字母的程序

脉冲宽度调制，VHDL代码编写，包括QUARTUSII和MODELSIM工程以及testbench-Pulse width modulation, VHDL coding, including QUARTUSII and ModelSim engineering and Testbench

URAT 部分VHDL源码 大家多多支持 哈哈 -VHDL source URAT part of U.S. support of Haha

VIP FPGA板的配套例子，这个是VGA格式lcd液晶屏幕显示用。(VIP board supporting example of this is the VGA format PREVIEW.)

vmm primer的使用使用文档，和之前vmm primer源代码配套使用！(vmm the primer use of the use of the document, and before supporting vmm the primer the source code to use!)

本实验为UART回环实例，实验程序分为顶层unrt_top、发送模块uart_tx、接收模块 uart_rx，以及时钟产生模块clk＿div。uart＿rx将收到的包解析出8位的数据，再传送给 uart_tx发出，形成回环。参考时钟频率为100MHz，波特率设定为9600bps。(This experiment is an example of UART loop. The experimental program is divided into top-level unrt_top, sending module uart_tx, receiving module uart_rx, and clock generation module clk_div. Uart_rx parses the received packet into 8 bits of data and sends it to uart_tx to send out, forming a loop. The reference clock frequency is 100 MHz and the baud rate is set to 9600 bps. stay)

本文件给出了基于VHDL语言的VGA图像显示程序及其工程问件。(This document is presented based on VHDL language VGA image display program and the project asked the pieces.)

vhdl参考程序，供初学者参考使用-VHDL reference procedures, their use and reference for beginners

这个是用VHDL实现FPGA对FLASH的读写。(This is achieved using VHDL FLASH FPGA to read and write.)

这是一个基于Quartus2 开发环境的4输入加法器( 4adder basic on Quartus2)

本设计是基于EP4CE15F17C8N和12864液晶的频率计程序(The design is based EP4CE15F17C8N and 12864 LCD frequency meter program)