实现控制8x8点阵动态显示字母的程序

使用vhdl语言编写的100个常用程序的例子-The use of VHDL language 100 examples of commonly used procedures

完整的GMSK调制及维特比译码，程序中包括了高斯滤波器的设计，调制相位的计算，并采用了维特比译码算法解调出原始码元，最后计算了其误码率。(Complete GMSK modulation and Viterbi decoding, the program includes a Gaussian filter design, the calculation of the phase modulation, and uses the Viterbi algorithm demodulates the source element, the final calculation of the bit error rate.)

人的移动的跟踪，VERILOG实现，能跟踪人的画面移动(Tracking the movement of people, VERILOG realize that can track the person)

用VHDL硬件描述语言开发的miniUART接口IP Core,用户可以将其嵌入到自己的FPGA模块中。-VHDL hardware description language developed by miniUART Interface IP Core, Users can be embedded into their own FPGA module.

vhdl project at sbu uni in iran uart

该模块采用cordic算法计算正弦和余弦，并采用参数化方式实现。 ；包中存在其他模块。

FPGA上用verilog写的SPWM控制程序，完美运行！自由调试，毕设内容，十分宝贵(The SPWM control program by verilog FPGA perfect run! Free commissioning, Bi-based content, invaluable)

vhdl语言，国外教材，数字信号处理算法(vhdl language, foreign materials, digital signal processing algorithms)

采用Verilog HDL设计，在Altera EP1S10S780C6开发板上实现 选取6MHz为基准频率，演奏的是梁祝乐曲 - Uses Verilog the HDL design, development board realizes in Altera on the EP1S10S780C6 selects 6MHz is the datum frequency, the performance is Liang wishes the music

用veriolg 语言编写的串口通讯程序，通过FPGA控制串口的通讯。(a veriog program completed on FPGA to contrlo a uart to communicaton with a computer )