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使用vhdl语言编写的100个常用程序的例子
使用vhdl语言编写的100个常用程序的例子-The use of VHDL language 100 examples of commonly used procedures
- 2022-08-18 05:39:29下载
- 积分:1
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main
完整的GMSK调制及维特比译码,程序中包括了高斯滤波器的设计,调制相位的计算,并采用了维特比译码算法解调出原始码元,最后计算了其误码率。(Complete GMSK modulation and Viterbi decoding, the program includes a Gaussian filter design, the calculation of the phase modulation, and uses the Viterbi algorithm demodulates the source element, the final calculation of the bit error rate.)
- 2020-11-03 16:19:54下载
- 积分:1
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TrackMe
人的移动的跟踪,VERILOG实现,能跟踪人的画面移动(Tracking the movement of people, VERILOG realize that can track the person)
- 2021-04-29 15:48:43下载
- 积分:1
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用VHDL硬件描述语言开发的miniUART接口IP Core,用户可以将其嵌入到自己的FPGA模块中。...
用VHDL硬件描述语言开发的miniUART接口IP Core,用户可以将其嵌入到自己的FPGA模块中。-VHDL hardware description language developed by miniUART Interface IP Core, Users can be embedded into their own FPGA module.
- 2022-10-05 02:20:03下载
- 积分:1
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UART_prj_ViHDL
vhdl project at sbu uni in iran
uart
- 2010-05-08 16:18:37下载
- 积分:1
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sin and cos with cordic VHDL
该模块采用cordic算法计算正弦和余弦,并采用参数化方式实现。 ;包中存在其他模块。
- 2022-05-25 06:14:20下载
- 积分:1
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SPWM
FPGA上用verilog写的SPWM控制程序,完美运行!自由调试,毕设内容,十分宝贵(The SPWM control program by verilog FPGA perfect run! Free commissioning, Bi-based content, invaluable)
- 2013-05-05 21:36:10下载
- 积分:1
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digital-processing-with-FPGA
vhdl语言,国外教材,数字信号处理算法(vhdl language, foreign materials, digital signal processing algorithms)
- 2016-07-22 21:53:49下载
- 积分:1
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Uses Verilog the HDL design, development board realizes in
Altera on the EP1S10S...
采用Verilog HDL设计,在Altera EP1S10S780C6开发板上实现
选取6MHz为基准频率,演奏的是梁祝乐曲
- Uses Verilog the HDL design, development board realizes in
Altera on the EP1S10S780C6 selects 6MHz is the datum frequency, the
performance is Liang wishes the music
- 2022-04-11 11:29:11下载
- 积分:1
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uart
用veriolg 语言编写的串口通讯程序,通过FPGA控制串口的通讯。(a veriog program completed on FPGA to contrlo a uart to communicaton with a computer )
- 2010-08-16 10:41:03下载
- 积分:1