实现控制8x8点阵动态显示字母的程序

CAN VHDL Code. Behavioral implementation of CAN bus interface.

使用FPGA的FIFO，状态机，乒乓操作等实现了异步UART。-The use of FPGA-FIFO, state machine, ping-pong operation to achieve the asynchronous UART.

This is a simple example of FIFO(first in and first out) module written in verilog code(This is a simple example of FIFO (first in and first out) module written in verilog code)

fpga上实现的51内核，带有LCD试验，顺利试验成功很好用。(on fpga implementation of 51 core with LCD test, successfully tested well with the smooth.)

说明：  用于FPGA设计的代码（Verilog代码），在FPGA设计中的高速串并转换，时钟提取，对齐处理等功能(for FPGA design ,written by Verilog HDL the functions include SERDES , CDR and so on)

一个使用VHDL设计的具有强大功能的32位CPU，这个文件包含了在Xilinx公司的ml505 FPGA上的位码文件和配置文件，可以直接下载使用！-A VHDL design with the use of powerful 32-bit CPU, this file contains the Xilinx company on the ml505 FPGA code and configuration files, you can direct download!

本代码是实现VGA的显示的，在quartus开发环境下能完整的实现VGA的彩色显示，彩色条纹，通过不同按键来实现不同的效果，对于初学者有很大的帮助。

FPGA to design in ECU, very help for engineer

说明：  实现了从摄像头读取数据到液晶的显示，利用了cycloneV 和康欣的开发板资源(It realizes the display of reading data from camera to liquid crystal.)

售货机-VHDL语言-已调试通过 真的很好用哦~适合一切学习EDA的初学者，能够让你轻松度过EDA课！~(Vending machine-VHDL language- has been really good with debugging by Oh ~ EDA for all beginners to learn, to let you easily through the EDA class! ~)