实现控制8x8点阵动态显示字母的程序

基于DE2的视频电话部分源码，实现了视频图像采集，VGA显示，局域网通讯等功能-DE2-based video telephony part of the source code to achieve the video image capture, VGA display, LAN communications function

16位有符号和无符号乘法器FPGA源代码(16-bit signed and unsigned multiplier FPGA source code)

用verilog hdl语言编写的fpga与片外sram 的读写控制(With the verilog hdl language fpga sram chip with read and write control)

verilog学习资料。附带简单的源代码列子，可以直接使用和仿真。(verilog learning materials. Source code with a simple Lie Zi, and simulation can be used directly.)

第一次输入和输出第一缓冲 vhdl 代码

基于System Generator的图像处理工程,多媒体处理FPGA实现的源码,基于视频的运动跟踪(System Generator based image processing engineering, multimedia processing on FPGA source, video-based motion tracking)

verilog 代码. 经验证成功,可以作为标准单元库,为FPGA设计者使用.-Verilog code. Certified success, as a standard cell library for the use of FPGA designers.

简单uart，verilog语言编写，已经经过测试，有需要的可以看看(Simple uart, Verilog language, has been tested, you can see if you need it)

DAC VHDL code using SPI method

在quartus中使用IP核的实际例子与流程-The use of IP in the Quartus practical examples and nuclear flow