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AD9226
FPGA控制AG9226进行采样的代码,并用signaltap测试了一下其正确性(FPGA control AG9226 to sample the code, and use signaltap to test the correctness of the demo.)
- 2020-12-19 17:19:09下载
- 积分:1
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32_lvds_test
Xilinx 公司Spartan-6系列FPGA实现LVDS,带Modelsim仿真文件,已综合。(Xilinx Spartan-6 Series FPGA implements LVDS with Modelsim simulation file, which has been synthesized.)
- 2020-11-30 20:59:27下载
- 积分:1
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ssi_tx
VHDL同步串口发送部分,基于Xilinx ISE的编程平台(synchronous serial port sending part on VHDL)
- 2021-01-18 20:08:43下载
- 积分:1
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PipelineCPU
Quartus II 7.2环境中,采用硬件描述语言VHDL独立完成了基于MIPS指令集的32位RISC处理器的逻辑设计(quartusII mips pipeline 32bit cpu design)
- 2010-05-26 16:51:42下载
- 积分:1
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reverse-string
programe reverse a string in c
- 2015-04-13 17:09:26下载
- 积分:1
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inv_matrix
矩阵求逆模块硬件实现,用verilog语言,基于ISE开发环境(implement of inverse matrix)
- 2021-03-24 10:19:14下载
- 积分:1
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32位浮点乘法verilog HDL
它是基于Verilog硬件描述语言浮动乘法器的数字化设计。该设计可以实现全功能,是更好的灵活性,其理论基础上浮动计算并补偿位移倍增。
- 2023-01-22 04:10:03下载
- 积分:1
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USB_GPIF-II
fpga模拟两路视频,简单拼接后,经过GPIF II接口传出给cy2014,测试usb的吞吐量(fpga generate two lane video, and transmit them through GPIF II interface. test cy2014)
- 2017-06-02 18:50:04下载
- 积分:1
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FPGA驱动DM9000
通过FPGA驱动DM9000的程序源代码,可以实现UDP协议传输,长时间测试速率不掉,可以参考
- 2022-09-23 16:40:04下载
- 积分:1
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fft_ex1
基于verilog的FFT设计,使用vivado作为开发平台(Verilog based on the FFT design, the use of vivado as a development platform)
- 2021-02-24 23:39:39下载
- 积分:1