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一个小液晶的程序。我没写。我只负责设计。
一个液晶灯的小程序。我没有写信。我只负责调试。适用于ACEXEP1K30QC208-3。我运行模拟器,标记连接销。我接下来在电路板上试了试,没有问题。实验中使用的板兄弟把CLK1的TESTOUT3改成了合唱或0。新人在线帮助是每个人的责任。
- 2022-02-09 15:34:18下载
- 积分:1
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EP2C70F896C6N-pins
将VHDL程序下载到DE2开发板,引脚分配时需要知道的芯片每个引脚功能(VHDL program will be downloaded to the DE2 development board, you need to know when the pin assignments for each pin of the chip functions)
- 2020-12-09 11:09:21下载
- 积分:1
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crc循环冗余校验码,用于对传输信号进行编码校验,是信息更可靠...
crc循环冗余校验码,用于对传输信号进行编码校验,是信息更可靠-crc cyclic redundancy check code used to transmit coded signals to verify, the information is more reliable
- 2022-12-26 06:05:03下载
- 积分:1
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zidong-shouhuoji
用VERILOG实现自动售货机功能,运行正确,希望有帮助(Use VERILOG implementation vending machine function, correct operation, hope to have help)
- 2014-01-05 20:42:49下载
- 积分:1
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Complete-RAM
ram 64KB designed by haneesh in verilog
- 2011-07-15 00:57:01下载
- 积分:1
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pj_gtx
说明: 利用高速口GTX进行快速的数据传输,包括接受和发送模块,用途广泛(The use of high-speed port GTX for fast data transmission, including receiving and sending modules, has a wide range of uses.)
- 2019-03-25 21:40:10下载
- 积分:1
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Chebyshev-filter
利用matlab设计了一个切比雪夫滤波器,并且对滤波器性能进行了仿真分析。(Using the matlab design a chebyshev filter, and has carried on the simulation analysis on filter performance.
)
- 2013-09-05 20:04:36下载
- 积分:1
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课程设计-数字钟
说明: 具有计时 设置时间 闹钟 秒表 功能的数字钟设计 外设矩阵键盘(Digital clock design peripheral matrix keyboard with the function of timing setting time alarm clock stopwatch)
- 2020-05-18 17:11:07下载
- 积分:1
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E1(一级欧洲传输标准)的VHDL
E1 (FIRST ORDER EUROPE TRANSMISSION STANDARD)vhdl
- 2022-04-22 01:03:35下载
- 积分:1
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sobel
在FPGA中,采用verilog HDL语言实现图像处理算法sobel,仿真实验通过(In the FPGA using verilog HDL language image processing algorithms sobel, simulation experiment)
- 2021-01-15 20:58:46下载
- 积分:1