采用systemc语言设计了一个状态机，主要包括两个进程，仿真结果表明状态机可以正常工作...

这是最后一个，处理器内部ROM，如有需要，大家就顶-this is the last one, the processors internal ROM, if necessary, on the top you

VHDL汇编语言原理及源代码。spartan 3e开发板试用。(VHDL language.)

说明：  artix 7系列 fpga mig ddr3应用教程(Artix 7 Series FPGA MIG DDR3 Application Tutorial)

SDRAM控制器源码，内含完整的控制器verilog源代码和测试代码，超值哈。(This readme file for the SDR SDRAM Controller includes information that was not incorporated into the SDR SDRAM Controller White Paper v1.1.)

VHDL code for MC68000

that file is different I2S example

用Verilog语言编写的实现NAND Flash块的控制存取以及同步的FIFO的控制-Using Verilog languages realize NAND Flash block to control access as well as the synchronization FIFO control

说明：  数字信道化过程中多相滤波器组matlab代码及测试(Digital channelized polyphase filter code and test)

图像采集 VGA输出 图像的边缘 ov7670(V image acquisition VGA output image edge)

文件描述的是SDH 指针处理和系统同步代码 veriolg(SDH pointer processing and system synchronization code veriolg of file Description)