show frequency measurement, external 24MHz crystal oscillator, the data show tha...

用Verilog语言实现了UART串行通信协议(Verilog language used to achieve a UART serial communication protocol)

用fpga驱动lcd的原代码，是用vhdl语言实现的-drive lcd by fpga，the source program is written by vhdl

SPI接口测试程序，Xilinx参考设计，ML507硬件测试通过.(SPI interface test code，Xilinx reference design，tested on ML507 platform.)

这是一些小代码的集合 希望能对大家有所帮助(This is a collection of some small code for all of us hope to be helpful)

这是一款CPLD的在线调试软件。能够满足用于学习者的一般要求。-This is a debugging software online CPLD. Be able to meet the general requirements for learners.

This application note explains the process of eveloping and debugging a hardware abstraction layer (HAL) software device driver, to aid device driver development for the HAL of the Altera Nios® II system. The various software development stages are illustrated using the Altera_Avalon_UART as an example hardware device, and an example of a HAL software device driver called my_uart.-This application note explains the process of eveloping and debugging a hardware abstraction layer (HAL) software device driver, to aid device driver development for the HAL of the Altera Nios® II system. The various software development stages are illustrated using the Altera_Avalon_UART as an example hardware device, and an example of a HAL software device driver called my_uart.

CPLD LATTICE1032测试模式代码-CPLD LATTICE1032 test model code

基于fpga的电子血压计。pdf文档，好用，内容清楚简单，转载而来(Electronic sphygmomanometer based on fpga)

here is realized simple FIFO stack in vhdl. very simple example, but very helpful.

电梯控制 记忆，上升下降停站 超载报警故障.....。-Verilog EDA dianti