一种有限域中积累的高效实现

一些verilo的经典实例，非常适合初学者(verilo of the classic examples, for beginners)

AD7991_7995_7999转换器说明(4-Channel, 12-/10-/8-Bit ADC with I2C-Compatible Interface in 8-Lead SOT-23)

The red arrow showed the output became 8 when the measured temperature changed to 11°C. As shown by black arrow, the maximum output was 28. The program was run according to the proposed method.

说明：  实现可连续输入数据做三角函数变换处理，通过verilog代码实现，(It realizes triangular function transformation for continuous input data.)

说明：  快速冒泡排序基于FPGA实现，有测试文件以及设计图，实现1024*32位数序的多数排序，突破传统是的REG类型少数排序，利用RAM，针对RAM中的无序数的地址调换，达到排序目的，仅供学习交流(Rapid bubble sort based on FPGA, there are test documents and design drawings to achieve 1024* 32-digit sequence of the majority of sorting, breaking tradition is a REG types of minority sorting, the use of RAM, the disorder for the RAM address of the number of exchange, to sort purpose, only to learn the exchange of.)

1 由matlab计算FIR数字滤波器的滤波系数； 2 用VHDL语言设计逻辑电路，再通过QUARTUS II 软件，将各个模块的电路封装成期间，在顶层设计中通过连线，完成整个系统。 (matlab VHDL QUARTUS )

本程序是用verilog 编写的模块，用来在lcd1602上显示用tlc549采样的电压值(This program is written in verilog module, used in lcd1602 display with tlc549 sampled voltage value)

fpga读取sd卡内容并且通过vga接口在显示器上显示图片(fpga read sd card contents and by vga interface to display pictures on the monitor)

本代码为h.264解码器的Verilog代码，在本压缩包中包含了全部Verilog代码，亲测成功，可以使用。

基于查找表的DDS的Verilog实现，分为相位累加器模块、ROM模块和顶层DDS模块(Verilog implementation of DDS based on lookup table)