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multi_booth
说明: 基于quartus的布斯乘法器的verilog 实现。布斯乘法算法是计算机中一种利用数的2的补码形式来计算乘法的算法。该算法由安德鲁·唐纳德·布斯于1950 年发明,当时他在伦敦大学伯克贝克学院做晶体学研究。布斯曾使用过台式计算器,由于用这种计算器来做移位计算比加法快,他发明了该算法来加快计算速度。(The verilog codes of booth multiplier based on quartus. Booth multiplication algorithm is a computer algorithm using the complement form of number 2 to calculate the multiplication. The algorithm was invented in 1950 by Andrew Donald booth, who was working on crystallography at birkbeck college, university of London. Booth used a desktop calculator, and because it was faster to do shifts than to add, he invented the algorithm to speed up the calculations.)
- 2019-01-06 10:03:08下载
- 积分:1
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DDS
文利用直接数字频率合成器(DDS)与CPLD技术和单片机控制技术,研制和
设计了高分辨率、高稳定度的函数信号发生(Wen using direct digital frequency synthesizer (DDS) and CPLD technology and single-chip microcomputer control technology, development and
Design of high resolution, high stability function of the signal
)
- 2013-08-27 14:20:22下载
- 积分:1
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ControlUnit
Control Unit VHDL code. Xilinx Spartan 3E board
- 2012-03-15 13:29:40下载
- 积分:1
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32_lvds_test
说明: Xilinx 公司Spartan-6系列FPGA实现LVDS,带Modelsim仿真文件,已综合。(Xilinx Spartan-6 Series FPGA implements LVDS with Modelsim simulation file, which has been synthesized.)
- 2020-11-30 20:59:27下载
- 积分:1
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利用EGO1数模混合口袋实验平台上的蓝牙模块与板卡进行无线通信 BLUE
利用EGO1数模混合口袋实验平台上的蓝牙模块与板卡进行无线通信。使用支持蓝牙 4.0 的手机与板卡上的蓝牙模块建立连接,并且通过手机 APP 发送命令,控制 FPGA 板卡上的硬件外设。(The Bluetooth module on the EGO1 digital-analog mixed pocket experimental platform is used to communicate with the board. The Bluetooth 4.0-enabled mobile phone is used to establish a connection with the Bluetooth module on the board, and commands are sent through the mobile phone APP to control the hardware peripherals on the FPGA board.)
- 2020-06-24 02:00:02下载
- 积分:1
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8路彩灯变换
实现1:8路彩灯同时亮灭;2:8路彩灯从左到右逐次亮灭;3:8路彩灯间隔亮灭;4:高电平清零5:包含分频
- 2022-01-25 21:17:22下载
- 积分:1
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jiaotongdeng
十字路口交通灯的单片机控制源代码 红黄绿三灯 还有数码管时间显示(Intersection traffic lights SCM source code red yellow three lights and LED time display)
- 2011-08-07 23:34:04下载
- 积分:1
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移位寄存器(右移和左移)
module shiftrne(R,L,E,w,Clock,Q);
parameter n=4;
input [n-1:0]R;
input L,E,w,Clock;
output reg [n-1:0]Q;
integer k;
always@(posedge Clock)
begin
if(L)
Q
- 2023-08-01 00:40:03下载
- 积分:1
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分数阶傅里叶变换FRFT的土耳其算法的FPGA实现的程序 FRFT Ozaktas
这是分数阶傅里叶变换FRFT的土耳其算法的FPGA实现的程序,FPGA是Xilinx的virtecx-5,这是我在做毕业设计的时候自己编写的,希望能对你有帮助!(This is the fractional Fourier transform algorithm FRFT Turkish FPGA implementation of the program, FPGA is the Xilinx virtecx-5, which is what I was doing graduate design time I have written, I hope you can help!)
- 2021-03-12 10:49:25下载
- 积分:1
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FPGA开发程序
针对初学FPGA的人,简单易懂,用notepad++打开可以看到QuartusII里的中文注释,方便学习和开发
- 2022-08-14 07:45:22下载
- 积分:1