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code
浙江大学体系结构实验代码 实现流水线的forwarding(Architecture, Zhejiang University Experimental code pipeline forwarding)
- 2020-09-26 11:57:46下载
- 积分:1
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ADV7180
files describe how to configure an ADV7180
- 2010-03-17 22:49:23下载
- 积分:1
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led_water
酷睿系列流水灯通用程序,来回往返流水,点亮led(ledwater for ep2c8q208c8)
- 2017-11-11 00:57:15下载
- 积分:1
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利用两个半加器来组成的全加器,是简单的vhdl语言入门
利用两个半加器来组成的全加器,是简单的vhdl语言入门-The use of two and a half adder to form the full adder is a simple entry-vhdl language
- 2023-08-01 03:35:04下载
- 积分:1
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VHDL language H.264 realize the opencore, meaning that documents, information su...
VHDL语言实现H.264的opencore,内涵说明文档、源码和文献等资料。 -VHDL language H.264 realize the opencore, meaning that documents, information such as source code and documentation.
- 2022-01-24 18:33:09下载
- 积分:1
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cputimer
基于 CPU 的精确计时器,时钟频率越高,计时越准(Based on the exact CPU timer, the higher clock frequency, the more time-quasi-)
- 2009-04-25 10:36:11下载
- 积分:1
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Examples of VHDL language, including a variety of logic gate structure.
vhdl 语言实例,包括各种逻辑门的构造。-Examples of VHDL language, including a variety of logic gate structure.
- 2022-08-08 14:03:44下载
- 积分:1
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波形发生器,带TESTBENCH,
多平台
波形发生器,带TESTBENCH,
多平台
-- the design makes use of the new shift operators available in the VHDL-93 std
-- this design passes the Synplify synthesis check
-- download from: www.fpga.com.cn & www.pld.com.cn
-waveform generator, with TESTBENCH. Multi-platform-- the design makes use of the new shift opera tors available in the VHDL-93 std-- this design passes the Synplify synthesis check-- downloa d from : www.fpga.com.cn
- 2023-05-18 16:15:03下载
- 积分:1
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32位二进制除法器2
- 2023-01-06 11:10:03下载
- 积分:1
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这是用VHDL编写的FPGA与计算机进行串口通信的程序和一个LED程序...
这是用VHDL编写的FPGA与计算机进行串口通信的程序和一个LED程序-VHDL and FPGA prepared by the computer serial communication procedures and an LED procedures
- 2022-01-25 15:54:47下载
- 积分:1