两位独立数码管100进制计数器，每1秒计数一次。从0到99，到99后又回到0....

自己写的位同步实验程序参考，该算法需要发送和接收方的频率比较稳定时，可以很快地达到位同步，且十分稳定。位同步是通信技术的基础之一，希望对大家学习有所帮助。(The program is a reference used for bitsynchro writed by myself.When the both send s and receive s frequency are stable,the program can reach bitsynchro fastly.)

16*16点阵横向移动显示！采用QUARTUS II 9.0编译通过！(16* 16 dot matrix display lateral movement! Compiled by using QUARTUS II 9.0!)

单片机和FPGA的通信程序，发送5个数，传输稳定，可以自行修改可一次传多个数(MCU and FPGA communication program, send five the number of stable transmission, you can modify the number may be more than one pass)

不错的Quartus II 与modelsim结合仿真简介笔记，较为适合初学者，希望对大家有帮助！()

verilog实现DLX指令集5段流水线(5 stage DLX pipeline implemented in verilog)

AES128 encription vhdl code

gps C/A码生成 生成gps32颗卫星伪码，方便，经过测试(gps C/A code generation to generate pseudo-code satellites gps32, convenient and tested)

shift register. vhdl verilog

riscMCU的VHDL实现，内附有modelsim仿真testbench和文档说明-riscMCU VHDL, modelsim containing a simulation testbench and documentation shows

周立功sopc教程的视频资料，适合广大自学者学习-ZLG sopc video tutorial is suitable for the general self-learners to learn