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attachments_2010_01_29
dct and idct vhdl code
- 2010-03-24 23:08:41下载
- 积分:1
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sine-wave-in-UPS
正弦波UPS中的逆变电路 包括原理分析 框图 及原理图(Sine wave UPS inverter circuit the principle analysis block diagram and schematic)
- 2013-03-20 10:13:13下载
- 积分:1
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b4b52
4b5b编码器实现,初学者资源,简单的逻辑电路实现(4b5b encoder implementation, resources for beginners)
- 2020-12-03 08:59:25下载
- 积分:1
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flash
fpga Verilog 控制读写flash (fpga Verilog flash )
- 2015-06-23 14:45:44下载
- 积分:1
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Spartan-6-PCIE_tutorial2
xilinx spartan 6 pcie 仿真教程,v2.4版本,主要是讲解如何使用pcie core和自己的用户逻辑级联仿真。(xilinx spartan 6 pcie sim tutorial ,tell readers how to sim using pcie core and user app logic,tool:questasim)
- 2020-11-23 19:19:34下载
- 积分:1
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OQPSK_fading
OQPSK在AWGN和频率选择性衰落信道中的仿真(OQPSK the AWGN and frequency selective fading channel simulation)
- 2021-04-05 21:49:03下载
- 积分:1
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EDA very important small procedures to ensure that key reliability and prevent j...
EDA中很重要的小程序,保证按键可靠性,防止抖动误差信号产生,外部信号输入时必用此消抖函数-EDA very important small procedures to ensure that key reliability and prevent jitter error signal generated, the external input signal must use this function Consumers shiver
- 2022-02-13 11:15:40下载
- 积分:1
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FIR低
fir低通滤波器 用于dspbuilder pll:25ns data 400khz sin 10.8khz-fir low-pass filter for dspbuilder pll: 25ns data 400khz sin 10.8khz
- 2023-05-01 00:45:03下载
- 积分:1
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NIOS II IDE 编程, 定时器测试程序,仅供参考。
NIOS II IDE 编程, 定时器测试程序,仅供参考。-NIOS II IDE programming timer testing procedures, for information purposes only.
- 2022-06-26 06:07:20下载
- 积分:1
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vhdl对dds的原理设计,由衷要得论文价值。不后悔
vhdl对dds的原理设计,由衷要得论文价值。不后悔-right dds VHDL design principle, we sincerely value of fine papers. No regrets
- 2022-07-26 10:48:53下载
- 积分:1