两位独立数码管100进制计数器，每1秒计数一次。从0到99，到99后又回到0....

OFDM系统中的相位跟踪模块（Phase_Tracking）的FPGA实现-Phase_Tracking in OFDM sysytems

控制路线和街道交叉口的简单程序，路线优先，街道上有车辆检测器；

用vhdl实现24小时计数器，方法简单实用。 仿真环境MAXPLUS--use VHDL to achieve 24-hour counter, simple and practical method. Simulation environment Segments-

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VHDL实现快速傅立叶变换 -VHDL implementation VHDL implementation of Fast Fourier Transform Fast Fourier Transform

fpga高手设计实战真经100则,最新的FPGA英文书籍，值得参考学习(100 Power Tips for FPGA Designers，The new FPGA English books, worth learning)

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通过上翻键和下翻键来设置方波信号正负脉冲宽度，利用一排流水灯来显示按键的次数，通过观察流水灯亮的盏数确定占空比（按一次上翻键亮一盏灯，流水灯全亮时占空比调到了最高或者是最低状态，按一次下翻键灭一盏灯，流水灯全灭时占空比调到了最低或者是最高状态）。(Duty cycle of LED lights and adjustable oscilloscope display code)

DDS信号发生器，能产生多种波形，正玄波，三角波，方波，频率可调，相位可调-DDS signal generator, can produce a variety of waveforms, are mysterious wave, triangle wave, square wave, frequency tunable, phase adjustable

数字秒表的VHDL代码。当设计文件加载到目标器件后，设计的数字秒表从00-00-00开始计秒。，直到按下停止按键（按键开关S2）。数码管停止计秒。按下开始按键（按键开关S1），数码管继续进行计秒。按下复位按键（核心板上复位键）秒表从00-00-00重新开始计秒。(The VHDL code for digital stopwatch. When the design document loaded into the target device, the designed digital stopwatch count the seconds from the 00-00-00. Until you press stop key (key switch S2). Nixie tube stop count seconds. Press the start button (key switch S1), the digital control continue to count seconds. Press the reset button (core panel reset button) to restart the stopwatch count seconds from the 00-00-00.)