两位独立数码管100进制计数器，每1秒计数一次。从0到99，到99后又回到0....

dct and idct vhdl code

正弦波UPS中的逆变电路 包括原理分析 框图 及原理图(Sine wave UPS inverter circuit the principle analysis block diagram and schematic)

4b5b编码器实现，初学者资源，简单的逻辑电路实现(4b5b encoder implementation, resources for beginners)

fpga Verilog 控制读写flash (fpga Verilog flash )

xilinx spartan 6 pcie 仿真教程，v2.4版本，主要是讲解如何使用pcie core和自己的用户逻辑级联仿真。(xilinx spartan 6 pcie sim tutorial ，tell readers how to sim using pcie core and user app logic,tool:questasim)

OQPSK在AWGN和频率选择性衰落信道中的仿真(OQPSK the AWGN and frequency selective fading channel simulation)

EDA中很重要的小程序，保证按键可靠性，防止抖动误差信号产生，外部信号输入时必用此消抖函数-EDA very important small procedures to ensure that key reliability and prevent jitter error signal generated, the external input signal must use this function Consumers shiver

fir低通滤波器 用于dspbuilder pll：25ns data 400khz sin 10.8khz-fir low-pass filter for dspbuilder pll: 25ns data 400khz sin 10.8khz

NIOS II IDE 编程， 定时器测试程序，仅供参考。-NIOS II IDE programming timer testing procedures, for information purposes only.

vhdl对dds的原理设计，由衷要得论文价值。不后悔-right dds VHDL design principle, we sincerely value of fine papers. No regrets