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作为一个简明的教程,主要宗旨是让初学者快速地了解FPGA/SOPC(可编程片上系统)开发的流程。...
作为一个简明的教程,主要宗旨是让初学者快速地了解FPGA/SOPC(可编程片上系统)开发的流程。-As a simple tutorial, the main purpose is to enable beginners to understand Express FPGA/SOPC (system on programmable chip) development process.
- 2022-02-05 10:08:14下载
- 积分:1
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lesson1
eda的入门学习课件,老师不错,内容页挺好的(eda learning files)
- 2012-12-14 22:39:31下载
- 积分:1
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altera niosii SOPC helloword learning
altera niosii SOPC helloword 学习-altera niosii SOPC helloword learning
- 2022-10-30 21:55:03下载
- 积分:1
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bubblesort1024ram
说明: 快速冒泡排序基于FPGA实现,有测试文件以及设计图,实现1024*32位数序的多数排序,突破传统是的REG类型少数排序,利用RAM,针对RAM中的无序数的地址调换,达到排序目的,仅供学习交流(Rapid bubble sort based on FPGA, there are test documents and design drawings to achieve 1024* 32-digit sequence of the majority of sorting, breaking tradition is a REG types of minority sorting, the use of RAM, the disorder for the RAM address of the number of exchange, to sort purpose, only to learn the exchange of.)
- 2010-03-24 15:19:50下载
- 积分:1
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v3
说明: mojo v3 complete eagle schematic
- 2018-02-08 22:47:52下载
- 积分:1
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FIRfilterverilogHDL
FIR滤波器的verilog HDL代码示例,以16阶为例(Verilog HDL code for fir filter)
- 2015-07-08 17:05:38下载
- 积分:1
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DA(AD768)
AD768产生锯齿波的源码,DA转化的最基本操作。(AD768 sawtooth source code, the basic operation of DA conversion.)
- 2014-03-19 09:39:54下载
- 积分:1
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完成十余卷积过程,简单方便,能够这样那样这样,sorry
完成十余卷积过程,简单方便,能够这样那样这样,sorry-Convolution process more than a decade to complete, simple and convenient, this can be done this way, sorry
- 2022-10-31 06:20:03下载
- 积分:1
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shuzijishiqi
基于VHDL的数字计时器,手动可控正计时和倒计时(含复位键和使能键)(VHDL-based digital timer and countdown timer being controlled manually (with the reset button and enable key))
- 2016-12-05 19:57:07下载
- 积分:1
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VGA信号的产生
产生VGA彩条信号(Verilog 语言)-Generate VGA signal
- 2022-05-05 22:12:14下载
- 积分:1