基于VHDL的LCD显示程序,包含完整的源代码,锁脚文件以及下载文件,可直接下载使用...

自己写的 AXI master code(AXI master code)

实现4种常见波形正弦、三角、锯齿、方波（A、B）的频率、幅度可控输出（方波 A的占空比也是可控的），可以存储任意波形特征数据并能重现该波形，还可完成 各种波形的线形叠加输出。 -Realize four kinds of common sine wave, triangle, sawtooth, square wave (A, B) the frequency, magnitude controllable output (square wave A, is also a controllable duty cycle), can store arbitrary waveform feature data and can reproduce the waveform, but also completed a variety of linear superposition of the output waveform.

VHDL Checkers Implementation by Ibrahim Elbouchikhi Amir Nader-Tehrani - VHDL Checkers Implementation by Ibrahim Elbouchikhi Amir Nader-Tehrani

FPGA AD数据采集模块，实现模拟信号到数字信号转换。(FPGA AD data acquisition module, the analog signal to digital signal conversion.)

关于逻辑信号的转变等等的一个程序。还包括显示(Analog-Digital-Wandler)

组合电路的设计8位加法器设计(ADD8.vhd)-Combinational Circuit Design 8-bit adder design (ADD8.vhd)

LatticeECP3 SERDES/PCS 使用指南(LatticeECP3 SERDES/PCS usage guide)

eda技术与vhdl课件,很经典的学习课件-VHDL EDA technology and courseware, it is a classic learning courseware

基于FPGA的DDS。可以产生三种波形：正弦，方波，三角波。频率分辨率0.012Hz。频率从0至25MHz任意可调。(FPGA-based DDS. Can produce three waveforms: sine, square, triangle wave. Frequency resolution 0.012Hz. Frequency is adjustable from 0 to 25MHz.)

verilog实现的“六进制约翰逊计数器”。(verilog implementation of the " six hexadecimal Johnson counters." )