基于VHDL的LCD显示程序,包含完整的源代码,锁脚文件以及下载文件,可直接下载使用...

SDIO slave, written in verilog, does not support SPI mode.

如果本版权声明未从文件中删除，并且任何衍生作品包含原始版权声明和相关免责声明，则可以不受限制地使用和分发本源文件。

基于FPGA的多功能电子时钟的设计很经典的哦-FPGA-based multi-functional electronic clock designs are very classic Oh

MODELSIM的实验程序，在QUARTUSii中调用MODELSIM，实现仿真-ModelSim Experimental procedures QUARTUSii call MODELSIM, realize Simulation

蛋蛋助手,可以动态配置生成代码格式,方便ORM或或程序员的生成工作 ，经测试 (Egg assistant, can be dynamically configured to generate code format, convenient ORM, or programmer generation work, tested)

说明：  简单的一个Verilog小程序，适合刚接触的人群(A simple Verilog small program, suitable for people just contact)

此压缩包里面有基于vivado平台的工程，包括了正弦信号的产生，还有fir滤波器的设计以及fft算法的设计实现(in this package,there are three projects of the generation of the signal of sin and the design of fir filter and the ari)

基于fpga的交织编码器设计，主要讲叙如何在fpga上实现交织编码器。-something about turbo。

自己总结的Altera_LVDS的IP核的设计及仿真分析，已在实际工程中应用到，并且带有源代码和仿真代码，总结的文档，非常有用。(My summary of the Altera_LVDS IP kernel design and simulation analysis, has been applied in practical engineering, and with source code and simulation code, summary of the document, very useful.)

基于ＦＰＧＡ，实现了移位除法的功能，程序接口简单，十分好用，已经验证。-Based on the FPGA, to achieve the division of functional shift, the program interface is simple, very easy to use, has already been verified.