GAMMA 校正

一个用Verilog写的电子锁工程，带testbench。(An electronic lock project written in Verilog with testbench.)

说明：  实现AHB转SRAM接口实现，支持猝发，零等待延迟(Implementation of AHB to SRAM Interface)

Set a bit and return its old value.

基于FPGA实现DSP与Rapid-IO网络互联()

FPGA控制AD逐点采集信号，并将AD转换后的数据串行发送出去。(FPGA to control the signal sampling point by point AD, AD conversion and serial data sent.)

实验课作业，下载可以直接跑，各个模块的完整代码。

spartan-3e fpga vhdl 实现的计数器 记满后点亮小灯(spartan-3e fpga vhdl counter to light led)

usb3.0 物理层仿真，verilog编程(Start the physical simulation)

verilog编写的SDRAM实验，有串口调试助手和相关资料！！！！！！！！！！！！！！！！！！！！！(Verilog prepared by the SDRAM experiment, a serial debugging assistant and related information!!!!!!!!!!!!!!!!!!!!!)

vhdl project at sbu uni in iran uart