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fpga
verilg语言实现测频 及与stm32以fsmc通信方式进行通信(Verilg to achieve frequency measurement and communication with STM32 in FSMC communication mode)
- 2017-07-27 20:05:25下载
- 积分:1
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AD_TLC549驱动程序
AD_TLC549驱动程序,Verilog开发,输出控制led点亮。
- 2023-07-21 05:35:03下载
- 积分:1
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shuzishizhong
数字时钟,包括流程图以及编码和完整的实验报告,内容详细丰富。(Digital clock, including flowcharts, and coding and a full lab report, detailed and rich.)
- 2011-12-20 19:53:07下载
- 积分:1
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svpwm3
说明: 基於空間向量調變的開關法,在於載波做比較切出方波再送至開關讓馬達啟動(Based on the switching method of space vector modulation, the square wave is cut out for carrier comparison and sent to the switch to start the moto)
- 2019-01-04 16:07:37下载
- 积分:1
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超声测距系统
主要使用特权同学spatan6开发板实现的,适合学习设计超声检测系统的作为初步学习
- 2022-02-12 03:59:03下载
- 积分:1
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SD_W_R
SD卡读写源代码.用Verilog编写.很不错.值得借鉴.特别对SD卡开发的人员!(SD card reader-writer source code. Prepared to use Verilog. Is pretty good. Be used for reference. In particular, the development of personnel SD card!)
- 2020-12-27 22:09:03下载
- 积分:1
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8B10B
以太网PHY层中的组成部分 8B10B编码器(Part of the Ethernet PHY layer in 8B10B encoder
)
- 2021-01-27 09:18:42下载
- 积分:1
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raised-cosine-filter
代码实现了一个根升余弦成型滤波器,2PAM信号通过此成型滤波器,并且匹配接收,画出了发送和接收波形,验证了代码的正确性。(The code designs a root raised cosine filter,2PAM signal transmitted through the filter and matched using the same filter, I plot the transmitted signal and received signal to verify the correctness of the code.)
- 2012-11-09 21:59:53下载
- 积分:1
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VHDL-DDS
基于FPGA的DDS信号源设计,32位相位累加器,产生可调频率(FPGA-based DDS signal source design, 32-bit phase accumulator to generate tunable frequency)
- 2013-06-27 15:16:15下载
- 积分:1
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Altera FPGA配置AD5300 Verilog代码
Altera FPGA 利用SPI口配置外部DACAD5300的Verilog代码,代码经调试后运行稳定。友情提示,由于本人水平有限,代码不可避免存在问题,敬请谅解
- 2022-09-05 02:50:03下载
- 积分:1